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    Printing system
    1.
    发明公开
    Printing system 失效
    Drucksystem

    公开(公告)号：EP0814598A2

    公开(公告)日：1997-12-29

    申请号：EP97109853

    申请日：1997-06-17

    Applicant: CANON KK

    Inventor： FURUYA YOJI ,  SUZUKI MASAYOSHI ,  OKAMOTO YOSHIFUMI ,  DOHI MAKOTO

    IPC: B41J21/00 ,  B41J5/30 ,  G06F3/12 ,  G06K15/00 ,  H04N1/32

    CPC classification number: H04N1/00408 ,  G06F3/1293 ,  G06K15/00 ,  G06K2215/0011 ,  H04N1/32358 ,  H04N1/32609 ,  H04N1/32635 ,  H04N1/32662 ,  H04N2201/0082 ,  H04N2201/329

    Abstract: A printing system includes a host computer and a printer. The host computer includes a memory which store process steps that are executable by a processor, and a processor. The processor executes the process steps stored in the memory (1) to divide encoded image data in a page of encoded image data into blocks, each block having a size which is less than a storage capacity of a buffer on a printer, and (2) to transmit the blocks of encoded image data to the printer. The printer includes a memory which stores process steps that are executable by a processor, and a processor. The processor executes the process steps stored in the memory (1) to store a predetermined amount of encoded image data in a buffer, (2) to control a printer engine to print images based on the encoded image data stored in the buffer, and (3) to store additional encoded image data, comprising blocks of the encoded image data, in the buffer in place of the encoded image data for which images have been printed.

    Abstract translation: 打印系统包括主机和打印机。 主机包括存储器，其存储可由处理器执行的处理步骤和处理器。 处理器执行存储在存储器（1）中的处理步骤，以将编码图像数据的页面中的编码图像数据划分成块，每个块的尺寸小于打印机上的缓冲器的存储容量，并且（2 ）将编码图像数据块发送到打印机。 打印机包括存储器，其存储可由处理器执行的处理步骤和处理器。 处理器执行存储在存储器（1）中的处理步骤以将预定量的编码图像数据存储在缓冲器中，（2）基于存储在缓冲器中的编码图像数据来控制打印机引擎打印图像，以及（ 3）将包括编码图像数据块的附加编码图像数据存储在缓冲器中，代替已经打印了图像的编码图像数据。

    2.
    发明专利
    未知

    公开(公告)号：DE69736375D1

    公开(公告)日：2006-09-07

    申请号：DE69736375

    申请日：1997-06-17

    Applicant: CANON KK

    Inventor： FURUYA YOJI ,  SUZUKI MASAYOSHI ,  OKAMOTO YOSHIFUMI ,  DOHI MAKOTO

    IPC: B41J21/00 ,  H04N1/32 ,  B41J5/30 ,  G06F3/12 ,  G06K15/00

    Abstract: A printing system includes a host computer and a printer. The host computer includes a memory which store process steps that are executable by a processor, and a processor. The processor executes the process steps stored in the memory (1) to divide encoded image data in a page of encoded image data into blocks, each block having a size which is less than a storage capacity of a buffer on a printer, and (2) to transmit the blocks of encoded image data to the printer. The printer includes a memory which stores process steps that are executable by a processor, and a processor. The processor executes the process steps stored in the memory (1) to store a predetermined amount of encoded image data in a buffer, (2) to control a printer engine to print images based on the encoded image data stored in the buffer, and (3) to store additional encoded image data, comprising blocks of the encoded image data, in the buffer in place of the encoded image data for which images have been printed.

    5.
    发明专利
    未知

    公开(公告)号：DE69225776D1

    公开(公告)日：1998-07-09

    申请号：DE69225776

    申请日：1992-11-13

    Applicant: CANON KK

    Inventor： OKAMOTO YOSHIFUMI

    IPC: B41J2/52 ,  B41J5/30 ,  G06K15/00 ,  G06K15/02 ,  G06T1/20 ,  G06T5/00 ,  G06T9/00 ,  H04N1/40 ,  H04N1/46

    Abstract: When binary image pixel data is converted into multi-level pixel data, the values of multi-level pixel data are previously set in predetermined registers. A circuit is provided for deciding whether or not the values set in the register are written in memory in accordance with the state of binary pixel data. N control circuits are provided in parallel, and N memory units to be respectively connected to the control circuits are also provided. This simultaneously multi-levelizes N items of binary pixel data.

    7.
    发明专利
    未知

    公开(公告)号：DE69225776T2

    公开(公告)日：1998-10-22

    申请号：DE69225776

    申请日：1992-11-13

    Applicant: CANON KK

    Inventor： OKAMOTO YOSHIFUMI

    IPC: B41J2/52 ,  B41J5/30 ,  G06K15/00 ,  G06K15/02 ,  G06T1/20 ,  G06T5/00 ,  G06T9/00 ,  H04N1/40 ,  H04N1/46

    Abstract: When binary image pixel data is converted into multi-level pixel data, the values of multi-level pixel data are previously set in predetermined registers. A circuit is provided for deciding whether or not the values set in the register are written in memory in accordance with the state of binary pixel data. N control circuits are provided in parallel, and N memory units to be respectively connected to the control circuits are also provided. This simultaneously multi-levelizes N items of binary pixel data.

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