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公开(公告)号:FR2835662B1
公开(公告)日:2005-08-19
申请号:FR0201498
申请日:2002-02-07
Applicant: CIT ALCATEL
Inventor: THEREZE JEAN MARIE , BALOCCO DIDIER
Abstract: The circuit has self-controlled synchronous rectifiers (3, 4 and 9, 10) generating individual rectified voltages for main and auxiliary outputs (2, 8). An auxiliary regulation control circuit (8) having a synchronization input (8B) controls the rectifier (9, 10) by feeding it with output of rectifier (3, 4) and a synchronization signal (Syn).
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公开(公告)号:FR2835662A1
公开(公告)日:2003-08-08
申请号:FR0201498
申请日:2002-02-07
Applicant: CIT ALCATEL
Inventor: THEREZE JEAN MARIE , BALOCCO DIDIER
Abstract: The circuit has self-controlled synchronous rectifiers (3, 4 and 9, 10) generating individual rectified voltages for main and auxiliary outputs (2, 8). An auxiliary regulation control circuit (8) having a synchronization input (8B) controls the rectifier (9, 10) by feeding it with output of rectifier (3, 4) and a synchronization signal (Syn).
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