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1.发明授权Digital logic frequency control loop for multivibrator composed of two monostable elements 失效用于由两个可单元素组成的多个激光器的数字逻辑频率控制环
公开(公告)号：US3870969A
公开(公告)日：1975-03-11
申请号：US41817373
申请日：1973-11-23
Applicant: CIT ALCATEL
Inventor： RABASSE JEAN
CPC classification number: H03K3/0307 , H03K3/72
Abstract: Servo-controlled frequency multivibrator composed of two monostable elements looped together comprising a first and second digital element controlling respectively a first and second logic gate ensuring in the one case the synchronous starting of the multivibrator on the pilot frequency F and in the other case the blocking thereof and a servo-control regulating circuit for the polarization voltage of the monostable elements, sensitive to the comparison between the end of the mth pulse having a frequency F and of the nth pulse having a frequency of f of the multivibrator, m and n being chosen so that m/F n/f.
Abstract translation: 由两个单稳态元件组成的伺服控制频率多谐振荡器，其包括分别控制第一和第二逻辑门的第一和第二数字元件，确保在一种情况下，多谐振荡器在导频F上的同步启动，另一种情况下阻塞 以及用于单稳元件的极化电压的伺服控制调节电路，对于具有频率F的第m个脉冲的端部与具有多谐振荡器f的频率f的第n个脉冲之间的比较敏感，m和n为 选择使得m / F = n / f。
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公开(公告)号：DE2363262A1
公开(公告)日：1974-07-04
申请号：DE2363262
申请日：1973-12-19
Applicant: CIT ALCATEL
Inventor： RABASSE JEAN
Abstract: Series type adder receiving numbers having different polarities, constituted by elementary series type adders combining the positive input numbers and the true complements of the negative input numbers to work out the sum SIGMA thereof, characterized in that it comprises means for calculating the sum S of the sign bits of the negative input numbers and effecting the storing thereof in a memory, means for extracting the exceeding number D appearing at the end of the calculating of SIGMA , means for comparing S and D in order to determine the sign of SIGMA existing in a memory register and in order to control the transferring thereof in true form, in an output, preceded by its sign.
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公开(公告)号：DE2358115A1
公开(公告)日：1974-06-27
申请号：DE2358115
申请日：1973-11-21
Applicant: CIT ALCATEL
Inventor： RABASSE JEAN
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