公开(公告)号：JPH07201908A

公开(公告)日：1995-08-04

申请号：JP32047394

申请日：1994-12-22

Applicant: CONS RIC MICROELETTRONICA

Inventor： FUERUCHIIO FURISHINA ,  MARUKANTONIO MANJIAGURI

IPC: H01L27/04 ,  H01L21/60 ,  H01L21/822 ,  H01L23/485 ,  H01L29/417 ,  H01L29/78

Abstract: PURPOSE: To prevent receiving effects due to mechanical stresses at the time of wire-bonding an active region of a power semiconductor device. CONSTITUTION: An integrated structure pad assembly for bonding a power semiconductor device chip is provided with a chip part, having a top surface which is completely covered by a metallic layer 10 forming the lower electrode of a power device. The chip part is provided with first sub-parts 1, where the functionally active elements of the power device exist inside. The chip part is provided with at least one second sub-part 11. The active element of the power device does not exist in the second sub-part. The top surface of the metallic layer 10 at the upper part of the second sub-part 11 is made higher than the metallic layer 10 in the first sub-part, and at least one protection part forming a supporting face for bonding wire is formed.