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公开(公告)号:JPH09312400A
公开(公告)日:1997-12-02
申请号:JP1285397
申请日:1997-01-27
Applicant: CONS RIC MICROELETTRONICA
Inventor: SARUBUATOORE REONARUDEI
IPC: H01L27/088 , H01L21/76 , H01L21/761 , H01L21/8222 , H01L21/8234 , H01L21/8248 , H01L21/8249 , H01L27/06 , H01L29/78
Abstract: PROBLEM TO BE SOLVED: To reduce manufacturing costs by integrating a step wherein isolation regions are formed and a step wherein annular boundary regions are formed into one step wherein doping ions are selectively implanted. SOLUTION: The resistance of an isolation region 6 in proximity to the surface is reduced. For the purpose, the region 6 is reinforced with a p-type doping nucleus in order to minimize contact resistance and improve the entire isolation structure. This is done by using p-type doping implantation. In other words, reinforced regions 30 and base regions 17, or reinforced regions 30 and deep body regions 20, or reinforced regions 30, body, emitter, source and drain regions 21, are simultaneously formed in the same implantation and diffusion step.
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公开(公告)号:JPH08274183A
公开(公告)日:1996-10-18
申请号:JP28050295
申请日:1995-10-27
Applicant: CONS RIC MICROELETTRONICA
IPC: H01L21/8234 , H01L27/06 , H01L27/092
Abstract: PROBLEM TO BE SOLVED: To remove a layer containing the existence of a parasitic transistor which is not desirable with former constitution, by providing at least one N channel-type MOS transistor stored in a well which is directly brought into contact with an isolation well for a control circuit for semiconductor device, which is formed on a substrate where a first conductivity type dopant is doped. SOLUTION: An integrated circuit is provided with a first epitaxial layer 2 which is grown on a substrate 1 and to which a first conductivity type dopant is doped and the isolation well to which a second conductivity type dopant is doped. The control circuit is provided with at least a first control transistor M1 to which a second conductivity type dopant is doped and which is formed in a first well 8 formed in the isolation well.
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