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公开(公告)号：BR8303993A
公开(公告)日：1984-03-07
申请号：BR8303993
申请日：1983-07-26
Applicant: CSELT CENTRO STUDI LAB TELECOM
Inventor： DEMICHELIS CARLO , MANCINI PAOLO , MATTONE PAOLO
Abstract: A multiple communications interface between processor and digital transmission means, such as a serial 32-channel 64 Kbit/s PCM group, able to utilize the group channels as an equal number of two-way communications paths between the processor and other nodes of a data communications system. Each path can be used for the interchange of data messages according to dialogue procedures of HDLC type, such as X25, X75 and No. 7 of CCITT.
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公开(公告)号：DK329283D0
公开(公告)日：1983-07-18
申请号：DK329283
申请日：1983-07-18
Applicant: CSELT CENTRO STUDI LAB TELECOM
Inventor： DEMICHELIS CARLO , MANCINI PAOLO , MATTONE PAOLO
Abstract: A multiple communications interface between processor and digital transmission means, such as a serial 32-channel 64 Kbit/s PCM group, able to utilize the group channels as an equal number of two-way communications paths between the processor and other nodes of a data communications system. Each path can be used for the interchange of data messages according to dialogue procedures of HDLC type, such as X25, X75 and No. 7 of CCITT.
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公开(公告)号：CA1198520A
公开(公告)日：1985-12-24
申请号：CA432551
申请日：1983-07-15
Applicant: CSELT CENTRO STUDI LAB TELECOM
Inventor： DEMICHELIS CARLO , MANCINI PAOLO , MATTONE PAOLO
Abstract: The invention provides a multiple communications interface between processor and digital transmission means, such as a serial 32-channel 64 Kbit/s PCM group, adapted to utilize the group channels as an equal number of two-way communications paths between the processor and other nodes of a data communications system. Each path can be used for the interchange of data messages according to dialogue procedures of HDLC type/ such as X25, X75 and No. 7 of CCITT.
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公开(公告)号：CA2000811A1
公开(公告)日：1990-04-17
申请号：CA2000811
申请日：1989-10-16
Applicant: CSELT CENTRO STUDI LAB TELECOM
Inventor： DEMICHELIS CARLO , MATTONE PAOLO , ZAPPLORTO ALESSANDRO
Abstract: A label switching and control interface for asynchronous fast packet switching consisting of a set of label switching and cell processing units controlled by a control unit; the units operate at each multiplex level in real time through using microprogrammed logic requiring control processor intervention only at connection set-up and release. The units implement low level flow control algorithms to exploit the advantages of this configuration. A label becomes indicative of a virtual circuit which is allotted only locally to a cell, thus removing the necessity for very complex labels, while the parameters which characterize the connection which uses a particular label are stored in the unit itself. Each unit switches the label characterizing the connection at the node input multiplex with the label characterizing it at the output multiplex. At the same time it associates, with each cell, the information necessary for multiplex switching which is then carried out in a self-routing network; the cells processed in this way by each unit of the set are statistically multiplexed asynchronously and sent to a connection network termination. This termination in turn serves other asynchronous multiplexes, which can operate at different frequencies. Label switching units do not have their own operating frequency, but automatically assume that of the asynchronous multiplexer to which they are connected.
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公开(公告)号：NO832726A
公开(公告)日：1984-01-30
申请号：NO832726
申请日：1983-07-26
Applicant: CSELT CENTRO STUDI LAB TELECOM
Inventor： MICHELIS CARLO DE , MANCINI PAOLO , MATTONE PAOLO
CPC classification number: H04L29/06
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Patent Agency Ranking
公开(公告)号：IT8267944D0
公开(公告)日：1982-07-27
申请号：IT6794482
申请日：1982-07-27
Applicant: CSELT CENTRO STUDI LAB TELECOM
Inventor： MANCINI CARLO DEMICHELIS PAOLO , MATTONE PAOLO
Abstract: A multiple communications interface between processor and digital transmission means, such as a serial 32-channel 64 Kbit/s PCM group, able to utilize the group channels as an equal number of two-way communications paths between the processor and other nodes of a data communications system. Each path can be used for the interchange of data messages according to dialogue procedures of HDLC type, such as X25, X75 and No. 7 of CCITT.
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公开(公告)号：IT1224493B
公开(公告)日：1990-10-04
申请号：IT6792488
申请日：1988-10-17
Applicant: CSELT CENTRO STUDI LAB TELECOM
Inventor： DE MICHELIS CARLO , MATTONE PAOLO , ZAPPALORTO ALESSANDRO
Abstract: A label-switching and control interface for asynchronous fast-packet switching consisting of a set of label-switching and cell-processing units controlled by a suitable control unit; said units operate at each multiplex level in real time thanks to a microprogrammed logic requiring the control processor intervention only at the connection set-up/release. Said units implement the low levels of the flow control algorithms necessary to conveniently exploit the advantages of said techniques. The label becomes indicative of a virtual circuit which is allotted only locally to the call, annulling thus the necessity of very extensive labels, while the parameters which characterize the connection which uses a particular label are stored in the unit itself. Each unit switches the label characterizing the connection on the node input multiplex, with that whereby it is characterized on the output multiplex and at the same time associates, with each cell, the information necessary to multiplex switching which is then carried out in a self-routing network; the cells processed in this way by each unit of the set are statistically multiplexed ifl an asynchronous way and sent to a connection network termination. Such a termination serves more asynchronous multiplexes, which can be at different frequency from each other and more particulary it is worth noticing that each label switching unit hasn't its own operating frequency, but automatically takes up that of the asynchronous multiplex it is connected to.
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公开(公告)号：NO832726L
公开(公告)日：1984-01-30
申请号：NO832726
申请日：1983-07-26
Applicant: CSELT CENTRO STUDI LAB TELECOM
Inventor： MICHELIS CARLO DE , MANCINI PAOLO , MATTONE PAOLO
Abstract: A multiple communications interface between processor and digital transmission means, such as a serial 32-channel 64 Kbit/s PCM group, able to utilize the group channels as an equal number of two-way communications paths between the processor and other nodes of a data communications system. Each path can be used for the interchange of data messages according to dialogue procedures of HDLC type, such as X25, X75 and No. 7 of CCITT.
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公开(公告)号：IT1155575B
公开(公告)日：1987-01-28
申请号：IT6794482
申请日：1982-07-27
Applicant: CSELT CENTRO STUDI LAB TELECOM
Inventor： DEMICHELIS CARLO , MANCINI PAOLO , MATTONE PAOLO
Abstract: A multiple communications interface between processor and digital transmission means, such as a serial 32-channel 64 Kbit/s PCM group, able to utilize the group channels as an equal number of two-way communications paths between the processor and other nodes of a data communications system. Each path can be used for the interchange of data messages according to dialogue procedures of HDLC type, such as X25, X75 and No. 7 of CCITT.
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公开(公告)号：AU550757B2
公开(公告)日：1986-04-10
申请号：AU1733083
申请日：1983-07-27
Applicant: CSELT CENTRO STUDI LAB TELECOM
Inventor： DEMICHELIS CARLO , MANCINI PAOLO , MATTONE PAOLO
Abstract: A multiple communications interface between processor and digital transmission means, such as a serial 32-channel 64 Kbit/s PCM group, able to utilize the group channels as an equal number of two-way communications paths between the processor and other nodes of a data communications system. Each path can be used for the interchange of data messages according to dialogue procedures of HDLC type, such as X25, X75 and No. 7 of CCITT.
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