公开(公告)号：EP0617367A2

公开(公告)日：1994-09-28

申请号：EP94302036.2

申请日：1994-03-22

Applicant: Compaq Computer Corporation

Inventor： Ayash, Basem Abu ,  Thome, Gary W.

IPC: G06F13/24

CPC classification number: G06F9/4812 ,  G06F9/463 ,  G06F12/02 ,  G06F13/24

Abstract: A system management mode address correction system for a computer provides correct address values on the address bus when the computer is in system management mode. Conventionally, bit 20 of the microprocessor's address outputs may be masked by asserting the FORCE A20 signal. The computer system also operates in a system management mode, which requires all of the address bits to be available for proper access to the system management interrupt vector. When the computer is in system management mode, the computer's microprocessor asserts a system management interrupt active (SMIACT*) signal. This signal is provided to a circuit which also receives the FORCE A20 signal. While the SMIACT signal is deactivated, the control circuit provides the true FORCE A20 signal to the computer system. When an SMI occurs, the SMIACT signal is activated and the FORCE A20 signal is disabled. As a result, the address generated by the microprocessor is asserted on the address bus.

Abstract translation: 当计算机处于系统管理模式时，用于计算机的系统管理模式地址校正系统在地址总线上提供正确的地址值。 通常，微处理器地址输出的位20可以通过声明FORCE A20信号来屏蔽。 计算机系统还以系统管理模式运行，这要求所有地址位可用于正确访问系统管理中断向量。 当计算机处于系统管理模式时，计算机的微处理器断言系统管理中断激活（SMIACT *）信号。 该信号被提供给也接收FORCE A20信号的电路。 当SMIACT信号被去激活时，控制电路将真实的FORCE A20信号提供给计算机系统。 发生SMI时，SMIACT信号被激活，而FORCE A20信号被禁止。 结果，微处理器产生的地址在地址总线上被断言。

公开(公告)号：EP0617367B1

公开(公告)日：1999-10-13

申请号：EP94302036.2

申请日：1994-03-22

Applicant: Compaq Computer Corporation

Inventor： Ayash, Basem Abu ,  Thome, Gary W.

IPC: G06F13/24

CPC classification number: G06F9/4812 ,  G06F9/463 ,  G06F12/02 ,  G06F13/24

公开(公告)号：EP0617367A3

公开(公告)日：1994-10-19

申请号：EP94302036.2

申请日：1994-03-22

Applicant: Compaq Computer Corporation

Inventor： Ayash, Basem Abu ,  Thome, Gary W.

IPC: G06F13/24

CPC classification number: G06F9/4812 ,  G06F9/463 ,  G06F12/02 ,  G06F13/24

Abstract: A system management mode address correction system for a computer provides correct address values on the address bus when the computer is in system management mode. Conventionally, bit 20 of the microprocessor's address outputs may be masked by asserting the FORCE A20 signal. The computer system also operates in a system management mode, which requires all of the address bits to be available for proper access to the system management interrupt vector. When the computer is in system management mode, the computer's microprocessor asserts a system management interrupt active (SMIACT*) signal. This signal is provided to a circuit which also receives the FORCE A20 signal. While the SMIACT signal is deactivated, the control circuit provides the true FORCE A20 signal to the computer system. When an SMI occurs, the SMIACT signal is activated and the FORCE A20 signal is disabled. As a result, the address generated by the microprocessor is asserted on the address bus.

Abstract translation: 当计算机处于系统管理模式时，计算机的系统管理模式地址校正系统在地址总线上提供正确的地址值。 通常，微处理器的地址输出的位20可以通过置位FORCE A20信号来屏蔽。 计算机系统也以系统管理模式运行，这要求所有的地址位可用于正确访问系统管理中断向量。 当计算机处于系统管理模式时，计算机的微处理器将激活系统管理中断激活（SMIACT *）信号。 该信号被提供给也接收FORCE A20信号的电路。 当SMIACT信号被禁用时，控制电路向计算机系统提供真实的FORCE A20信号。 发生SMI时，SMIACT信号被激活，FORCE A20信号被禁用。 结果，微处理器产生的地址在地址总线上被置位。