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公开(公告)号:WO2020028207A1
公开(公告)日:2020-02-06
申请号:PCT/US2019/043831
申请日:2019-07-28
Applicant: CRAY INC.
Inventor: KIM, Hyunjun , BECKER, Andy , FITZKE, Jim , SMITH, Brad , WILDES, Paul
Abstract: To eliminate signal loss and sources of signal attenuation, a connection methodology is utilized which enables high-speed signals to be directly communicated from particular integrated circuits housed on a printed circuit board, to other locations within a system. More specifically, a signal escape strategy directly connects a high-speed cable to a point on the circuit board which is very close to the integrated circuit itself. A back-side connection methodology is utilized so that electrical signals pass directly from the integrated circuit through a via, to a connection point on the backside of the circuit board. To accommodate this connection, a specially designed interposer and related paddle cards are utilized so the high-speed communication cable can be easily attached.
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公开(公告)号:EP3334259A1
公开(公告)日:2018-06-13
申请号:EP17205368.8
申请日:2017-12-05
Applicant: Cray Inc.
Inventor: BECKER, Andy
CPC classification number: H05K1/0224 , H01P3/026 , H01P11/003 , H05K1/0219 , H05K1/0237 , H05K1/025 , H05K3/22 , H05K2201/093 , H05K2203/0307
Abstract: Signal transmission structures within a printed circuit are formed to have reduced loss by making specific accommodations to reduce the surface roughness of an adjacent power plane (14), and thereby reducing the effects of magnetically induced currents. The power plane structure will retain sufficient surface roughness to accommodate manufacturing operations, while also contributing to reduced signal transmission losses in the adjacent signal transmission structure (20, 30). The transmission structures thereby being capable of more efficiently transmitting high speed signals without undesired attenuation and loss.
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公开(公告)号:EP3361837A1
公开(公告)日:2018-08-15
申请号:EP18155527.7
申请日:2018-02-07
Applicant: Cray Inc.
Inventor: BECKER, Andy , KIM, Hyunjun , UTZ, Shawn , WILDES, Paul
CPC classification number: H05K1/0251 , G06F17/5009 , G06F17/5072 , G06F17/5081 , H05K1/024 , H05K1/112 , H05K1/113 , H05K1/116 , H05K3/0005 , H05K3/4007 , H05K3/4038 , H05K3/429 , H05K2201/09454 , H05K2201/096 , H05K2201/09718 , H05K2201/09781
Abstract: The various structures forming communication paths on a printed circuit board can create several undesired effects, especially when high frequency signals are considered. Non-functional pads created during the manufacturing process have the potential to create an undesired effect, but when the overall collection of non-functional pads are carefully configured, an optimized communication path can be formed. More specifically, by selectively removing some collection of the non-functional pads, the high frequency characteristics of the communication paths can be optimized.
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