公开(公告)号：EP1793496A2

公开(公告)日：2007-06-06

申请号：EP06077098.9

申请日：2006-11-24

Applicant: Delphi Technologies, Inc.

Inventor： Lin, Yingjie ,  Sanchez, Manuel S.

IPC: H03K17/082

CPC classification number: H03K17/0822 ,  H03K17/284 ,  H03K17/6877

Abstract: A control circuit for a vehicle for, e.g., chassis leveling or other purposes includes a controller (12) selectively sending drive signals to a load (14) through a switch FET (M1), and a BJT having a collector connected between the switch FET (M1), an emitter connected to ground, and a base connected to a current view resistor for short circuit protection. An over power protection FET (M2) is connected to the controller (12) and to the base of the short circuit protection transistor (Q1), with the gate of the over power protection FET (M2) being connected to the output of the switch FET (M1). A time delay capacitor is connected from the base of the BJT to ground. With this structure, if a ground fault causes the BJT to turn on, and if the drain-source voltage of the switch FET (M1) exceeds the gate threshold voltage of the overpower protection FET, the overpower protection FET is turned on, resulting in turning off the switch FET (M1) and, hence, avoidance of high power draw through the switch FET (M1).

Abstract translation: 用于例如底盘调平或其它目的的用于车辆的控制电路包括控制器（12），其通过开关FET（M1）选择性地将驱动信号发送到负载（14），并且具有收集器的BJT连接在开关FET （M1），连接到地的发射极和连接到用于短路保护的电流检测电阻器的基极。 过电保护FET（M2）连接到控制器（12）和短路保护晶体管（Q1）的基极，过功率保护FET（M2）的栅极连接到开关的输出端 FET（M1）。 延时电容器从BJT的基极连接到地。 通过这种结构，如果接地故障导致BJT导通，并且如果开关FET（M1）的漏极 - 源极电压超过过功率保护FET的栅极阈值电压，则过功率保护FET导通，导致 关断开关FET（M1），因此避免了通过开关FET（M1）的大功率抽取。

公开(公告)号：EP1793496A3

公开(公告)日：2009-07-08

申请号：EP06077098.9

申请日：2006-11-24

Applicant: Delphi Technologies, Inc.

Inventor： Lin, Yingjie ,  Sanchez, Manuel S.

IPC: H03K17/082

CPC classification number: H03K17/0822 ,  H03K17/284 ,  H03K17/6877

Abstract: A control circuit for a vehicle for, e.g., chassis leveling or other purposes includes a controller (12) selectively sending drive signals to a load (14) through a switch FET (M1), and a BJT having a collector connected between the switch FET (M1), an emitter connected to ground, and a base connected to a current view resistor for short circuit protection. An over power protection FET (M2) is connected to the controller (12) and to the base of the short circuit protection transistor (Q1), with the gate of the over power protection FET (M2) being connected to the output of the switch FET (M1). A time delay capacitor is connected from the base of the BJT to ground. With this structure, if a ground fault causes the BJT to turn on, and if the drain-source voltage of the switch FET (M1) exceeds the gate threshold voltage of the overpower protection FET, the overpower protection FET is turned on, resulting in turning off the switch FET (M1) and, hence, avoidance of high power draw through the switch FET (M1).