中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

3 records (took 0.02 seconds)

    LARGE FIELD OF VIEW MULTI-CAMERA ENDOSCOPIC APPARATUS WITH OMNI-DIRECTIONAL ILLUMINATION
    2.
    发明申请
    LARGE FIELD OF VIEW MULTI-CAMERA ENDOSCOPIC APPARATUS WITH OMNI-DIRECTIONAL ILLUMINATION 审中-公开
    大视野多全息照相内窥镜设备全向照射

    公开(公告)号：WO2015128801A3

    公开(公告)日：2015-11-26

    申请号：PCT/IB2015051379

    申请日：2015-02-24

    Applicant: ECOLE POLYTECH

    Inventor： COGAL ÖMER ,  LEBLEBICI YUSUF

    IPC: A61B1/00 ,  A61B1/04 ,  A61B1/05 ,  A61B1/07 ,  G03B37/04 ,  G06T7/00 ,  H04N5/232

    CPC classification number: H04N5/23238 ,  A61B1/00009 ,  A61B1/00181 ,  A61B1/041 ,  A61B1/051 ,  A61B1/07 ,  G03B15/03 ,  G03B37/005 ,  G03B37/04 ,  G06T3/4015 ,  G06T3/4038 ,  H04N5/2252 ,  H04N5/2256 ,  H04N5/2352 ,  H04N5/2354 ,  H04N5/243 ,  H04N5/247 ,  H04N2005/2255

    Abstract: A multi-camera hemispherical very wide field of view imaging apparatus with omnidirectional illumination capability comprises a cylindrical body (4, 4.a, 4.b), a hemispherical mechanical frame (2) arranged on one end of the cylindrical body (4, 4.a, 4.b), a plurality of imaging channels (3), each imaging channel (3) comprising at least an image sensor and related optics with a fixed focus appropriate for endoscopic imaging, the plurality of imaging channels (3) being distributed over the hemispherical mechanical frame (2), a light source arranged centre-down at a back part of the plurality of imaging channels (3) and inside or at the end of the cylindrical body (4, 4.a, 4.b). Each imaging channel (3) comprises a plurality of lightning channels (1) around their centre, each of the plurality of lightning channels (1) comprising at least one microfiber light guide having a determined angle of curvature arranged to transmit the light from the light source. The imaging apparatus further comprises a control and processing circuit (5) comprising a camera control unit (6), an illumination control unit (7), an illumination unit (8), a sample and capture unit (9), an image processing unit (10) and an output interface (11) to a PC. The camera control unit (6) is configured to power each of the plurality of imaging channels (3) and make automatic gain compensation for each imaging channel (3), the illumination control unit (7) is configured for automatic intensity dimming, the sample and capture unit (9) is an interface circuit for correct sampling, extraction and capturing frames of individual imaging channels (3), the image processing unit (10) is configured for constructing a spherical panoramic image by applying a determined algorithm, and the output interface (11) is arranged to output the spherical panoramic image to a system configured to visualize it.

    Abstract translation: 一种具有全方向照明能力的多照相机半球形非常宽视场成像设备，包括：圆柱形主体（4,4a，4b）;布置在圆柱形主体（4,4a）的一端上的半球形机械框架（2） 多个成像通道（3），每个成像通道（3）至少包括图像传感器和具有适合于内窥镜成像的固定焦点的相关光学器件，多个成像通道（3） 在所述半球形机械框架（2）上分布，在所述多个成像通道（3）的后部中心以及在所述圆柱形本体（4，4.a，4）的内部或端部处布置的光源。 b）。 每个成像通道（3）包括围绕其中心的多个闪电通道（1），所述多个闪电通道（1）中的每一个包括至少一个微纤维光导，所述至少一个微纤维光导具有确定的曲率角度， 资源。 该成像装置还包括控制和处理电路（5），该电路包括相机控制单元（6），照明控制单元（7），照明单元（8），采样和捕获单元（9），图像处理单元 （10）和输出接口（11）到PC。 照相机控制单元（6）被配置为给多个成像通道（3）中的每一个供电并为每个成像通道（3）进行自动增益补偿，照明控制单元（7）被配置用于自动强度调光，样品 和捕捉单元（9）是用于对各个成像通道（3）的帧进行正确采样，提取和捕捉的接口电路，所述图像处理单元（10）被配置为通过应用确定的算法来构造球形全景图像，并且所述输出 接口（11）被布置成将球形全景图像输出到被配置为使其可视化的系统。

    POST-CMOS PROCESSING AND 3D INTEGRATION BASED ON DRY-FILM LITHOGRAPHY
    3.
    发明申请
    POST-CMOS PROCESSING AND 3D INTEGRATION BASED ON DRY-FILM LITHOGRAPHY 审中-公开
    基于干膜光刻的后CMOS处理和3D集成

    公开(公告)号：WO2014020479A3

    公开(公告)日：2014-04-10

    申请号：PCT/IB2013055946

    申请日：2013-07-19

    Applicant: ECOLE POLYTECH

    Inventor： GUIDUCCI CARLOTTA ,  LEBLEBICI YUSUF ,  TEMIZ YÜKSEL

    IPC: H01L21/60 ,  H01L21/683 ,  H01L21/768 ,  H01L21/98 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065

    CPC classification number: H01L25/50 ,  G03F7/2022 ,  G03F7/32 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3185 ,  H01L24/02 ,  H01L24/05 ,  H01L24/24 ,  H01L24/27 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L2221/68381 ,  H01L2224/02313 ,  H01L2224/0239 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24146 ,  H01L2224/27002 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/82002 ,  H01L2224/82005 ,  H01L2224/8201 ,  H01L2224/82101 ,  H01L2224/82106 ,  H01L2224/82143 ,  H01L2224/83143 ,  H01L2224/83203 ,  H01L2224/8385 ,  H01L2224/9202 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/00013 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

    Abstract: A method for performing a post processing patterning on a diced chip having a footprint, comprises the steps of: - providing a support wafer; - applying a first dry film photoresist to the support wafer; - positioning a mask corresponding to the footprint of the diced chip on the first dry film photoresist; - exposing the mask and the first dry film photoresist to UV radiation; - removing the mask; - developing the exposed first dry film photoresist to obtain a cavity corresponding to the diced chip; - positioning the diced chip inside the cavity; - applying a second dry film photoresist to the first film photoresist and the diced chip; - exposing and developing the second dry film photoresist applied to the diced chip in accordance with the post processing pattern; and - performing an anisotropic dry etching of the chip to form a via therein. Furthermore, a method for obtaining a stack of two semiconductor chips or wafers in a back to face configuration, whereby at least one of the semiconductor chips or wafers comprises a through silicon via (TSV), comprises the steps of: - providing a first semiconductor chip or wafer; - providing a second semiconductor chip or wafer; - making a hole through the second semiconductor chip or wafer from a face side to a back side; - applying the face side of second semiconductor chip or wafer on a release tape; - depositing parylene on the assembly of the second semiconductor chip or wafer and the release tape, thereby obtaining a sidewall passivation in the hole and a bonding layer on the back side of the second semiconductor chip or wafer; - releasing the release tape, thereby obtaining a membrane of parylene covering an opening of the hole on the front side; - positioning the back side of the second semiconductor chip or wafer relative to a face side of the first semiconductor chip or wafer; - bonding the second semiconductor chip or wafer to the first semiconductor chip or wafer by applying pressure and heat; - removing the membrane of parylene by directional etching; and - electrically connecting the face side of the second semiconductor chip or wafer to the face side of the first semiconductor chip or wafer by depositing a conductor inside the hole, thereby obtaining the TSV.

    Abstract translation: 一种用于在具有占地面积的切割芯片上执行后处理图案化的方法包括以下步骤： - 提供支撑晶片; - 将第一干膜光致抗蚀剂施加到所述支撑晶片; - 将对应于切割芯片的覆盖区的掩模定位在第一干膜光致抗蚀剂上; - 将所述掩模和所述第一干膜光致抗蚀剂暴露于UV辐射; - 去除面膜; - 将暴露的第一干膜光致抗蚀剂显影以获得对应于切割芯片的腔; - 将切割的芯片定位在腔内; - 将第二干膜光致抗蚀剂施加到第一膜光致抗蚀剂和切割的芯片上; - 根据后处理图案曝光和显影施加到切割的芯片上的第二干膜光致抗蚀剂; 以及 - 对所述芯片进行各向异性干蚀刻以在其中形成通孔。 此外，一种用于以背对面配置获得两个半导体芯片或晶片的堆叠的方法，由此半导体芯片或晶片中的至少一个包括贯穿硅通孔（TSV），包括以下步骤： - 提供第一半导体 芯片或晶片; - 提供第二半导体芯片或晶片; - 从第二半导体芯片或晶片从正面到背面形成一个孔; - 将第二半导体芯片或晶片的表面施加在释放带上; - 将聚对二甲苯沉积在第二半导体芯片或晶片和释放带的组件上，从而在孔中获得侧壁钝化和在第二半导体芯片或晶片的背面上的结合层; - 释放释放带，从而获得覆盖前侧的孔的开口的聚对二甲苯膜; - 相对于所述第一半导体芯片或晶片的正面侧定位所述第二半导体芯片或晶片的背面; - 通过施加压力和热量将所述第二半导体芯片或晶片接合到所述第一半导体芯片或晶片; - 通过定向蚀刻去除聚对二甲苯膜; 以及 - 通过在孔内沉积导体，将第二半导体芯片或晶片的表面侧电连接到第一半导体芯片或晶片的正面，从而获得TSV。

Patent Agency Ranking