-
公开(公告)号：AT418823T
公开(公告)日：2009-01-15
申请号：AT01999073
申请日：2001-11-29
Applicant: ERICSSON TELEFON AB L M
Inventor： DAVIDSSON STEFAN , WALTHER ROGER , WENGER FABIAN , PAULI MATHIAS , SCHRAMM PETER , WACHSMANN UDO
Abstract: A radio receiver system ( 30 ) comprises a radio receiver ( 41 ), a receiver sample clock ( 60 ), which is used for sampling a modulated base-band signal; and a timing correction unit ( 100 ). The timing correction unit ( 100 ) performs, in the frequency domain, a timing drift compensation between a transmitter sample clock ( 66 ) and the receiver sample clock ( 60 ). In one example context of implementation, the plural modulated radio frequency carriers have been modulated using Orthogonal Frequency Division Multiplexing (OFDM).
-
2.发明专利
公开(公告)号：ES2317956T3
公开(公告)日：2009-05-01
申请号：ES01999073
申请日：2001-11-29
Applicant: ERICSSON TELEFON AB L M
Inventor： DAVIDSSON STEFAN , WALTHER ROGER , WENGER FABIAN , PAULI MATHIAS , SCHRAMM PETER , WACHSMANN UDO
Abstract: Un aparato de receptor de radio que comprende: un receptor de radio (41) que recibe diferentes portadoras de frecuencias de radio moduladas y produce desde allí una señal de banda de base modulada, habiendo sido las diferentes portadoras de frecuencias de radio moduladas transmitidas por un radio transmisor (38) que opera de acuerdo con un reloj de muestra de transmisor (66) en el que la frecuencia de radio y el reloj de muestra se derivan de la misma fuente; un reloj de muestra de receptor (60) que se usa para muestrear la señal de banda de base modulada; una unidad de estimación de desviación de frecuencia (102, 150) que proporciona una estimación de la desviación de la frecuencia, t0; una unidad de corrección de temporización (100), que lleva a cabo en el dominio de la frecuencia una compensación de la desviación de la temporización entre el reloj de muestra del transmisor y el reloj de muestra del receptor. caracterizado porque el aparato comprende también un controlador en modo durmiente (200) adaptado de manera que obtiene (11-1) una estimación de la desviación de la frecuencia, foff; deriva (11-2) una desviación del reloj de muestra correspondiente a la estimación, t0, siendo una desviación entre el reloj de muestra del receptor y el reloj de muestra del transmisor de la siguiente relación:** ver fórmula** donde f off es una estimación de la desviación de la frecuencia absoluta en Hz, y f c es una frecuencia de portadora en Hz; determina (11-3) la desviación de la temporización, Toff, durante un periodo de sueño de una duración dada Tsleep, de acuerdo con** ver fórmula** determina (11-4) el tamaño de la mitad de la anchura de una ventana de búsqueda asumiendo un error máximo del reloj de muestra del receptor de acuerdo con Twind/2 = Tsleep u tores, asumiendo un error máximo, tores, del reloj de muestra, t0; contando desde el tiempo t=0 cuando entra el modo de sueño y determinando que el receptor debe dormir (11-5) hasta el tiempo t expresado por** ver fórmula** y busca (11-6) el inicio de la trama hasta el tiempo expresado por ** ver fórmula**
-
公开(公告)号：DE60035373T2
公开(公告)日：2008-03-13
申请号：DE60035373
申请日：2000-12-05
Applicant: ERICSSON TELEFON AB L M
Inventor： LINDBERG MIKAEL , DAVIDSSON STEFAN , HANSSON ULF
Abstract: A semiconductor arrangement is provided for generating a predetermined time delay. Two clocks are connected to two parallel, redundant semi-conductor circuits emitting clock signals from multiplexers. The redundant circuits receive delayed clock signals from one of the clocks, and from the other clock, clock signals that are delayed in adjustable delay circuits to be phased in with the clock signals from the first clock. A number of delay elements and a first reference number of delay elements, providing a predetermined delay time, are connected in a reference delay circuit. A quotient of the two numbers is stored. One of the semi-conductor circuits is replaced by an alternative semi-conductor circuit, the reference delay circuit of which is set on the predetermined delay time, corresponding to a second reference number of delay elements. An adjustable delay circuit is set on the same delay time as the replaced semi-conductor circuit by means of the second reference number and the quotient.
-
Patent Agency Ranking
公开(公告)号：AT365996T
公开(公告)日：2007-07-15
申请号：AT00986120
申请日：2000-12-05
Applicant: ERICSSON TELEFON AB L M
Inventor： LINDBERG MIKAEL , DAVIDSSON STEFAN , HANSSON ULF
Abstract: A semiconductor arrangement is provided for generating a predetermined time delay. Two clocks are connected to two parallel, redundant semi-conductor circuits emitting clock signals from multiplexers. The redundant circuits receive delayed clock signals from one of the clocks, and from the other clock, clock signals that are delayed in adjustable delay circuits to be phased in with the clock signals from the first clock. A number of delay elements and a first reference number of delay elements, providing a predetermined delay time, are connected in a reference delay circuit. A quotient of the two numbers is stored. One of the semi-conductor circuits is replaced by an alternative semi-conductor circuit, the reference delay circuit of which is set on the predetermined delay time, corresponding to a second reference number of delay elements. An adjustable delay circuit is set on the same delay time as the replaced semi-conductor circuit by means of the second reference number and the quotient.
-
公开(公告)号：DE60137141D1
公开(公告)日：2009-02-05
申请号：DE60137141
申请日：2001-11-29
Applicant: ERICSSON TELEFON AB L M
Inventor： DAVIDSSON STEFAN , WALTHER ROGER , WENGER FABIAN , PAULI MATHIAS , SCHRAMM PETER , WACHSMANN UDO
Abstract: A radio receiver system ( 30 ) comprises a radio receiver ( 41 ), a receiver sample clock ( 60 ), which is used for sampling a modulated base-band signal; and a timing correction unit ( 100 ). The timing correction unit ( 100 ) performs, in the frequency domain, a timing drift compensation between a transmitter sample clock ( 66 ) and the receiver sample clock ( 60 ). In one example context of implementation, the plural modulated radio frequency carriers have been modulated using Orthogonal Frequency Division Multiplexing (OFDM).
-
公开(公告)号：DE60035373D1
公开(公告)日：2007-08-09
申请号：DE60035373
申请日：2000-12-05
Applicant: ERICSSON TELEFON AB L M
Inventor： LINDBERG MIKAEL , DAVIDSSON STEFAN , HANSSON ULF
Abstract: A semiconductor arrangement is provided for generating a predetermined time delay. Two clocks are connected to two parallel, redundant semi-conductor circuits emitting clock signals from multiplexers. The redundant circuits receive delayed clock signals from one of the clocks, and from the other clock, clock signals that are delayed in adjustable delay circuits to be phased in with the clock signals from the first clock. A number of delay elements and a first reference number of delay elements, providing a predetermined delay time, are connected in a reference delay circuit. A quotient of the two numbers is stored. One of the semi-conductor circuits is replaced by an alternative semi-conductor circuit, the reference delay circuit of which is set on the predetermined delay time, corresponding to a second reference number of delay elements. An adjustable delay circuit is set on the same delay time as the replaced semi-conductor circuit by means of the second reference number and the quotient.
-
公开(公告)号：AU2241501A
公开(公告)日：2002-06-18
申请号：AU2241501
申请日：2000-12-05
Applicant: ERICSSON TELEFON AB L M
Inventor： LINDBERG MIKAEL , DAVIDSSON STEFAN , HANSSON ULF
Abstract: A semiconductor arrangement is provided for generating a predetermined time delay. Two clocks are connected to two parallel, redundant semi-conductor circuits emitting clock signals from multiplexers. The redundant circuits receive delayed clock signals from one of the clocks, and from the other clock, clock signals that are delayed in adjustable delay circuits to be phased in with the clock signals from the first clock. A number of delay elements and a first reference number of delay elements, providing a predetermined delay time, are connected in a reference delay circuit. A quotient of the two numbers is stored. One of the semi-conductor circuits is replaced by an alternative semi-conductor circuit, the reference delay circuit of which is set on the predetermined delay time, corresponding to a second reference number of delay elements. An adjustable delay circuit is set on the same delay time as the replaced semi-conductor circuit by means of the second reference number and the quotient.
-
公开(公告)号：AU1861102A
公开(公告)日：2002-06-11
申请号：AU1861102
申请日：2001-11-29
Applicant: ERICSSON TELEFON AB L M
Inventor： DAVIDSSON STEFAN , WALTHER ROGER , WENGER FABIAN , PAULI MATHIAS , SCHRAMM PETER , WACHSMANN UDO
Abstract: A radio receiver system ( 30 ) comprises a radio receiver ( 41 ), a receiver sample clock ( 60 ), which is used for sampling a modulated base-band signal; and a timing correction unit ( 100 ). The timing correction unit ( 100 ) performs, in the frequency domain, a timing drift compensation between a transmitter sample clock ( 66 ) and the receiver sample clock ( 60 ). In one example context of implementation, the plural modulated radio frequency carriers have been modulated using Orthogonal Frequency Division Multiplexing (OFDM).
-
-
-
-
-
-
-
Search Results
8
records
(took 0.021 seconds)
