OSCILLATING CIRCUIT WITH TUNABLE FILTER FOR MINIMIZING PHASE NOISE
    2.
    发明公开
    OSCILLATING CIRCUIT WITH TUNABLE FILTER FOR MINIMIZING PHASE NOISE 有权
    WITH A屏蔽FILTER TO相位噪声降到最小振荡电路

    公开(公告)号:EP1943659A4

    公开(公告)日:2013-12-18

    申请号:EP05789951

    申请日:2005-10-05

    Abstract: The present invention relates to an oscillating circuit arrangement having a resonating arrangement with a first resonance frequency (coo) comprising a voltage controlled oscillator arrangement. It further comprises a tunable filter arrangement connected to the source node of said voltage controlled oscillator (VCO) arrangement. Said filter arrangement particularly comprises an equivalent current source resonating at a second resonance frequency c&thetas;f, the second resonance frequency being a multiple n, n=1 or 2 of said first resonance frequency (α>o), n being equal to the minimum number of switch transistors required for oscillation of said VCO arrangement. The filter arrangement particularly comprises an inductor connected in parallel with a capacitor, said capacitor being adapted to be tunable such that the phase noise of the resonating arrangement can be minimized through tuning of the filter arrangement.

    A VARACTOR DEVICE WITH REDUCED TEMPERATURE DEPENDENCE

    公开(公告)号:CA2582322C

    公开(公告)日:2013-12-10

    申请号:CA2582322

    申请日:2004-10-11

    Abstract: The invention discloses a varactor device (100) for improved temperature stability, comprising a first varactor (160) connected to a decoupling network (150). The device further comprises a voltage stabilizer (110), said stabilizer comprising a capacitor (140) and a temperature dependent capacitor (130), and in that the stabilizer comprises means for connection to a DC-feed (120). Suitably, the decoupling network (150) is connected in parallel to the first varactor (160), and the capacitor (140) of the voltage stabilizer (110) is connected in parallel to the decoupling network (150), the temperature dependent capacitor (130) of the voltage stabilizer (110) being connected in series to the diode of the voltage stabilizer (110).

    6.
    发明专利
    未知

    公开(公告)号:AT426265T

    公开(公告)日:2009-04-15

    申请号:AT05817018

    申请日:2005-11-23

    Abstract: The present invention relates to a sub-harmonically pumped conversion mixer arrangement that includes a transistor arrangement and transistor terminals for application of a local oscillator, LO-, signal and application of a radio frequency, RF-, signal and for extraction of a mixed intermediate frequency, IF-, signal. The transistor arrangement includes at least one NMOS transistor and at least one PMOS transistor. The drain of the at least one NMOS transistor is interconnected with the drain of the at least one PMOS transistor, and in that the gate of the at least one PMOS transistor is interconnected with the gate of the at least one NMOS transistor.

    A VARACTOR DEVICE WITH REDUCED TEMPERATURE DEPENDENCE

    公开(公告)号:CA2582322A1

    公开(公告)日:2006-04-20

    申请号:CA2582322

    申请日:2004-10-11

    Abstract: The invention discloses a varactor device (100) for improved temperature stability, comprising a first varactor (160) connected to a decoupling network (150). The device further comprises a voltage stabilizer (110), said stabilizer comprising a capacitor (140) and a temperature dependent capacitor (130), and in that the stabilizer comprises means for connection to a DC-feed (120). Suitably, the decoupling network (150) is connected in parallel to the first varactor (160), and the capacitor (140) of the voltage stabilizer (110) is connected in parallel to the decoupling network (150), the temperature dependent capacitor (130) of the voltage stabilizer (110) being connected in series to the diode of the voltage stabilizer (110).

    A delay-locked loop with precision controlled delay

    公开(公告)号:AU2003304613A1

    公开(公告)日:2005-06-29

    申请号:AU2003304613

    申请日:2003-12-10

    Abstract: The invention discloses a delay-locked loop circuit with input means for a signal that is to be delayed, the input means comprising means for splitting the input signal into a first and a second branch. The signal in the first branch is connected to a component for delaying the signal, and the signal in the second branch is used as a non-delayed reference for the delay caused by the delay component in the first branch. The delay component is a passive tunable delay line, and the circuit comprises tuning means for the tunable delay line, the tuning means being affected by said reference signal, and the first branch comprises output means for outputting a delayed signal with a chosen phase delay. Suitably, the delay component is continuously tunable, for example a tunable ferroelectric delay line.

    AN OSCILLATOR CIRCUIT WITH TUNEABLE SIGNAL DELAY MEANS

    公开(公告)号:CA2545983A1

    公开(公告)日:2005-06-23

    申请号:CA2545983

    申请日:2003-12-10

    Abstract: The invention discloses an oscillator circuit ( 100, 200, 300, 400 ), comprising an oscillating element ( 110, 210, 310, 410 ) and output means ( 115, 215, 315, 415 ) for outputting an oscillation frequency from the oscillating circuit. The circuit further comprises a signal delay means ( 120, 220, 320, 420 ) which is arranged in series with the oscillating element and feeds the output signal back to the oscillating element. The delay means is ( 120, 220, 320, 420 ) tuneable with respect to the delay it provides. The oscillating element can be an amplifier or a VCO, and the delay means can be a Delay Locked Loop or a tuneable delay line, depending on the embodiment of the invention.

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