公开(公告)号：WO2009017800A2

公开(公告)日：2009-02-05

申请号：PCT/US2008009270

申请日：2008-07-31

Applicant: FORCE10 NETWORKS INC

Inventor： GOERGEN JOEL R ,  SUBRAMANIAN KRISHNAMURTHY ,  GUI ANN

IPC: H04L25/03

CPC classification number: H04L25/03866 ,  H04L7/04 ,  H04L25/14 ,  H04L25/4908

Abstract: In one embodiment, a hybrid backplane coding scheme transmits data using lengthy sequences of scrambled data, separated by 8b/ 10b control character sequences that prepare the receiver for the next scrambled sequence and permit realignment if necessary. Several lanes are coded separately in this manner, and then multiplexed on a common channel. Alignment sequences in the control character sequences, as well as scrambler seeds, are set to avoid synchronization of patterns generated among all lanes, which would tend to confuse a receiving serdes and/or phase-locked loop that recovers timing from the multiplexed scrambled signals.

Abstract translation: 在一个实施例中，混合背板编码方案使用冗余的加扰数据序列来发送数据，该数据由8b / 10b控制字符序列分隔，其为下一个加扰序列准备接收机，并且如果需要则允许重新对准。 以这种方式分开编码几个通道，然后在公共信道上多路复用。 设置控制字符序列中的对准序列以及加扰器种子以避免在所有通道之间产生的模式的同步，这将趋向于混淆从多路复用的加扰信号恢复定时的接收serdes和/或锁相环路。

公开(公告)号：WO2009023238A1

公开(公告)日：2009-02-19

申请号：PCT/US2008009713

申请日：2008-08-13

Applicant: FORCE10 NETWORKS INC

Inventor： GOERGEN JOEL R ,  HUNT GREG

IPC: H05K3/42 ,  H05K1/02

CPC classification number: H05K3/429 ,  H05K1/0216 ,  H05K1/0237 ,  H05K3/0047 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09845 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/175 ,  Y10T29/49165

Abstract: A high-speed router backplane is disclosed. The router backplane uses differential signal pairs on multiple signal layers, each sandwiched between a pair of digital ground layers. Thru- holes are used to connect the differential signal pairs to external components. To reduce routing complexity, at least some of the differential signal pairs route through a via pair, somewhere along their path, to a different signal layer. At least some of the thru-holes and vias are drilled to reduce an electrically conductive stub length portion of the hole. The drilled portion of a hole includes a transition from a first profile to a second profile to reduce radio frequency reflections from the end of the drilled hole.

Abstract translation: 公开了一种高速路由器背板。 路由器背板在多个信号层上使用差分信号对，每个信号对夹在一对数字接地层之间。 通孔用于将差分信号对连接到外部组件。 为了降低路由复杂度，差分信号对中的至少一些在其路径的某处沿着不同的信号层路由通路对。 钻出至少一些通孔和通孔以减少孔的导电短截线长度部分。 孔的钻孔部分包括从第一轮廓到第二轮廓的转变，以减少从钻孔的端部的射频反射。

公开(公告)号：WO03073808A8

公开(公告)日：2005-04-07

申请号：PCT/US0227987

申请日：2002-09-03

Applicant: FORCE10 NETWORKS INC

Inventor： GOERGEN JOEL R

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/16 ,  H05K3/42 ,  H05K3/46 ,  H05K7/14

CPC classification number: H05K1/0245 ,  H05K1/0248 ,  H05K1/116 ,  H05K1/162 ,  H05K3/429 ,  H05K3/4641 ,  H05K7/1459 ,  H05K2201/09236 ,  H05K2201/09263 ,  H05K2201/09454 ,  H05K2201/09636 ,  H05K2201/09718

Abstract: A high-speed router backplane, and method for its fabrication, are disclosed. The backplane uses differential signaling trace pairs on multiple high-speed signaling layers, the high-speed signaling layers separated by ground planes. Plated signaling thru-holes connect the trace pairs to the board surface for connection to external components. The signaling thru-holes pass through clearances in each ground plane. At selected ground planes, a conductive pad is patterned within each high-speed signaling thru-hole clearance, the pad slightly larger than the thru-hole diameter. The pads affect the impedance characteristics of the thru-holes, thus providing a better impedance match to the differential trace pairs, reducing signal reflections, and improving the ability to signal across the backplane at high speeds.

Abstract translation: 公开了一种高速路由器背板及其制造方法。 背板在多个高速信号层上使用差分信令跟踪对，高速信号层由接地层分开。 电镀信号通孔将走线对连接到电路板表面，以连接到外部组件。 信号通孔穿过每个接地平面内的间隙。 在选定的接地平面，每个高速信号通孔间隙内的导电焊盘都被图案化，焊盘略大于通孔直径。 这些焊盘影响通孔的阻抗特性，从而为差分走线对提供更好的阻抗匹配，减少信号反射，并提高高速信号跨背板的能力。