公开(公告)号：WO2006079870A1

公开(公告)日：2006-08-03

申请号：PCT/IB2005/000446

申请日：2005-01-31

Applicant: FREESCALE SEMICONDUCTOR, INC ,  RENAUD, Philippe ,  BERTRAND, Isabelle

Inventor： RENAUD, Philippe ,  BERTRAND, Isabelle

IPC: B81C1/00 ,  H01L21/20 ,  H01L21/762

CPC classification number: B81C1/00611 ,  B81C2201/0119 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02494 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02667

Abstract: In the field of sensor fabrication, it is known to form a silicon-on-insulator starting structure from which fabrication of the sensor based. The present invention provides a method of forming a silicon-on-insulator structure comprising a substrate (102) having an insulating layer (104) patterned thereon. A silicon oxide layer (106) is then deposited over the patterned insulating layer (104) before silicon is grown over both an exposed surface of the substrate (102) as well as the silicon oxide layer (106), mono-crystalline silicon (108) forming on the exposed parts of the substrate (102) and polysilicon (110) forming on the silicon oxide layer (106). After depositing a capping layer 112 over the structure, the wafer is heated, whereby the polysilicon (110) re-crystallises to form mono-crystalline silicon (108), resulting in the insulating layer 104 being buried beneath mono-crystalline silicon.

Abstract translation: 在传感器制造领域中，已知形成绝缘体上硅开始结构，从而制造基于传感器的开关结构。 本发明提供一种形成绝缘体上硅结构的方法，其包括在其上图案化的绝缘层（104）的衬底（102）。 然后在硅在衬底（102）的暴露表面以及氧化硅层（106），单晶硅（108）之上生长硅之前，在图案化的绝缘层（104）上沉积氧化硅层（106） ）形成在形成在氧化硅层（106）上的衬底（102）和多晶硅（110）的暴露部分上。 在结构上沉积覆盖层112之后，加热晶片，由此多晶硅（110）重新结晶以形成单晶硅（108），导致绝缘层104被埋在单晶硅之下。

公开(公告)号：EP1846321B1

公开(公告)日：2010-12-22

申请号：EP05702532.2

申请日：2005-01-31

Applicant: Freescale Semiconductor Inc.

Inventor： RENAUD, Philippe ,  BERTRAND, Isabelle

IPC: B81C1/00 ,  H01L21/20 ,  H01L21/762 ,  H01L21/268 ,  C30B25/10

CPC classification number: B81C1/00611 ,  B81C2201/0119 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02494 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02667

Abstract: In the field of sensor fabrication, it is known to form a silicon-on-insulator starting structure from which fabrication of the sensor based. The present invention provides a method of forming a silicon-on-insulator structure comprising a substrate (102) having an insulating layer (104) patterned thereon. A silicon oxide layer (106) is then deposited over the patterned insulating layer (104) before silicon is grown over both an exposed surface of the substrate (102) as well as the silicon oxide layer (106), mono-crystalline silicon (108) forming on the exposed parts of the substrate (102) and polysilicon (110) forming on the silicon oxide layer (106). After depositing a capping layer 112 over the structure, the wafer is heated, whereby the polysilicon (110) re-crystallises to form mono-crystalline silicon (108), resulting in the insulating layer 104 being buried beneath mono-crystalline silicon.

公开(公告)号：EP1846321A1

公开(公告)日：2007-10-24

申请号：EP05702532.2

申请日：2005-01-31

Applicant: Freescale Semiconductor Inc.

Inventor： RENAUD, Philippe ,  BERTRAND, Isabelle

IPC: B81C1/00 ,  H01L21/20 ,  H01L21/762

CPC classification number: B81C1/00611 ,  B81C2201/0119 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02494 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02667

Abstract: In the field of sensor fabrication, it is known to form a silicon-on-insulator starting structure from which fabrication of the sensor based. The present invention provides a method of forming a silicon-on-insulator structure comprising a substrate (102) having an insulating layer (104) patterned thereon. A silicon oxide layer (106) is then deposited over the patterned insulating layer (104) before silicon is grown over both an exposed surface of the substrate (102) as well as the silicon oxide layer (106), mono-crystalline silicon (108) forming on the exposed parts of the substrate (102) and polysilicon (110) forming on the silicon oxide layer (106). After depositing a capping layer 112 over the structure, the wafer is heated, whereby the polysilicon (110) re-crystallises to form mono-crystalline silicon (108), resulting in the insulating layer 104 being buried beneath mono-crystalline silicon.