Epitaxial silicon CMOS-MEMS microphones and method for manufacturing
    4.
    发明公开
    Epitaxial silicon CMOS-MEMS microphones and method for manufacturing 有权
    Epitaxiales Silizium CMOS-MEMS-Mikrofon und Herstellungsverfahren

    公开(公告)号:EP2536168A2

    公开(公告)日:2012-12-19

    申请号:EP12169041.6

    申请日:2012-05-23

    Abstract: A method of manufacturing a microphone using epitaxially grown silicon. A monolithic wafer structure is provided. A wafer surface of the structure includes poly-crystalline silicon in a first horizontal region and mono-crystalline silicon in a second horizontal region surrounding a perimeter of the first horizontal region. A hybrid silicon layer is epitaxially deposited on the wafer surface. Portions of the hybrid silicon layer that contact the poly-crystalline silicon use the poly-crystalline silicon as a seed material and portions that contact the mono-crystalline silicon use the mono-crystalline silicon as a seed material. As such, the hybrid silicon layer includes both mono-crystalline silicon and poly-crystalline silicon in the same layer of the same wafer structure. A CMOS/membrane layer is then deposited on top of the hybrid silicon layer.

    Abstract translation: 使用外延生长硅制造麦克风的方法。 提供了一种单片晶圆结构。 该结构的晶片表面包括第一水平区域中的多晶硅和围绕第一水平区域的周边的第二水平区域中的单晶硅。 混晶硅层外延沉积在晶片表面上。 接触多晶硅的混合硅层的部分使用多晶硅作为种子材料,并且接触单晶硅的部分使用单晶硅作为种子材料。 因此,混合硅层在同一晶片结构的相同层中包括单晶硅和多晶硅两者。 然后将CMOS /膜层沉积在混合硅层的顶部。

    PROCESSING FOR OVERCOMING EXTREME TOPOGRAPHY
    6.
    发明申请
    PROCESSING FOR OVERCOMING EXTREME TOPOGRAPHY 有权
    处理极端地形图

    公开(公告)号:US20140141618A1

    公开(公告)日:2014-05-22

    申请号:US14097956

    申请日:2013-12-05

    Abstract: A process for overcoming extreme topographies by first planarizing a cavity in a semiconductor substrate in order to create a planar surface for subsequent lithography processing. As a result of the planarizing process for extreme topographies, subsequent lithography processing is enabled including the deposition of features in close proximity to extreme topographic surfaces (e.g., deep cavities or channels) and, including the deposition of features within a cavity. In a first embodiment, the process for planarizing a cavity in a semiconductor substrate includes the application of dry film resists having high chemical resistance. In a second embodiment, the process for planarizing a cavity includes the filling of cavity using materials such as polymers, spin on glasses, and metallurgy.

    Abstract translation: 通过首先平面化半导体衬底中的空腔以便创建用于后续光刻处理的平坦表面来克服极端形貌的过程。 作为极端形貌的平面化处理的结果,可以进行随后的光刻处理,包括紧邻极端地形表面(例如,深空腔或通道)的特征沉积,并且包括在空腔内沉积特征。 在第一实施例中,用于平面化半导体衬底中的腔的方法包括施加具有高耐化学性的干膜抗蚀剂。 在第二实施例中,用于平坦化空腔的方法包括使用诸如聚合物,玻璃旋转和冶金的材料来填充空腔。

    Methods for planarization and encapsulation of micromechanical devices
in semiconductor processes
    8.
    发明授权
    Methods for planarization and encapsulation of micromechanical devices in semiconductor processes 失效
    半导体工艺中微机械器件的平面化和封装的方法

    公开(公告)号:US5504026A

    公开(公告)日:1996-04-02

    申请号:US422036

    申请日:1995-04-14

    Applicant: Joseph T. Kung

    Inventor: Joseph T. Kung

    Abstract: A method for fabricating a micromechanical device and a semiconductor circuit on a substrate includes the steps of forming the micromechanical device on a device area of the substrate, the micromechanical device being embedded in a sacrificial material, selectively depositing a planarization layer on the substrate in a circuit area thereof, forming the semiconductor circuit on the planarization layer in the circuit area and removing the sacrificial material from the embedded micromechanical device. In a preferred embodiment, the planarization layer is an epitaxial silicon layer. A protective cap may be formed over the micromechanical device, so that it is completely encapsulated and is thereby protected against particulate contamination.

    Abstract translation: 在衬底上制造微机械器件和半导体电路的方法包括以下步骤:在衬底的器件区域上形成微机械器件,微机械器件嵌入牺牲材料中,在衬底上选择性地沉积平坦化层 在电路区域的平坦化层上形成半导体电路,并从嵌入式微机械器件中除去牺牲材料。 在优选实施例中,平坦化层是外延硅层。 可以在微机械装置上形成保护帽,使得其完全被包封并由此被保护免受颗粒污染。

    METHODS FOR PLANARIZATION AND ENCAPSULATION OF MICROMECHANICAL DEVICES IN SEMICONDUCTOR PROCESSES
    10.
    发明申请
    METHODS FOR PLANARIZATION AND ENCAPSULATION OF MICROMECHANICAL DEVICES IN SEMICONDUCTOR PROCESSES 审中-公开
    半导体工艺中微机电设备的平面化和封装方法

    公开(公告)号:WO1996032650A1

    公开(公告)日:1996-10-17

    申请号:PCT/US1996004856

    申请日:1996-04-09

    Abstract: A method for fabricating a micromechanical device (48) and a semiconductor circuit (70) on a substrate (10) includes the steps of forming the micromechanical device (48) on a device area (58) of the substrate (10), the micromechanical device (48) being embedded in a sacrificial material (22, 34, 42), selectively depositing a planarization layer (54) on the substrate (10) in a circuit area (56) thereof, forming the semiconductor circuit (70) on the planarization layer (54) in the circuit area (56) and removing the sacrificial material (22, 34, 42) from the embedded micromechanical device (48). In a preferred embodiment, the planarization layer is an epitaxial silicon layer (54). A protective cap (98) may be formed over the micromechanical device (48), so that it is completely encapsulated and is thereby protected against particulate contamination.

    Abstract translation: 在衬底(10)上制造微机械器件(48)和半导体电路(70)的方法包括以下步骤:在衬底(10)的器件区域(58)上形成微机械器件(48),所述微机械 器件(48)嵌入在牺牲材料(22,34,42)中,在其电路区域(56)中在衬底(10)上选择性地沉积平坦化层(54),在其上形成半导体电路(70) 平面化层(54),并且从嵌入式微机械装置(48)去除牺牲材料(22,34,42)。 在优选实施例中,平坦化层是外延硅层(54)。 可以在微机械装置(48)上方形成保护盖(98),使得其完全被包封,从而防止颗粒污染。

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