公开(公告)号：EP1190376A1

公开(公告)日：2002-03-27

申请号：EP01919611.2

申请日：2001-04-02

Applicant: GEMPLUS ,  STMicroelectronics S.A.

Inventor： GOMEZ, Bertrand

IPC: G06K19/07

CPC classification number: G06K19/0723

Abstract: The invention concerns a self-powered integrated circuit, wherein a device regenerating supply voltages (Vdd, Gnd) comprise an oscillating circuit (1) at the terminals (A, B) and at least a MOS transistor provided in a housing on a terminal (A, B) at least of the oscillating circuit (1), whereof the drain or the source is connected to said terminal. A load modulating device comprises means (4) for polarising the housing of the transistor(s) (M2, M3), at the first supply voltage (Vdd) or at the second voltage (Gnd), in accordance with a logic modulation signal (mod).

公开(公告)号：EP1264338A1

公开(公告)日：2002-12-11

申请号：EP01913999.7

申请日：2001-03-13

Applicant: GEMPLUS ,  STMicroelectronics S.A.

Inventor： DELL'OVA, Francis ,  RIZZO, Pierre ,  LHERMET, Frank ,  POIROT, Dominique ,  RAYON, Stéphane ,  GOMEZ, Bertrand ,  LESSOILE, Nicole

IPC: H01L21/66 ,  H01L23/66

CPC classification number: H01L22/14 ,  H01L22/20 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention concerns a method for making an integrated electronic component arranged on a substrate wafer comprising at least two metallising steps. The invention is characterised in that the value of an electrical parameter of the component is determined after a metallising step, and one of the following metallising processes is carried out with an adjusting mask selected among n predefined masks to obtain a desired value of the parameter, the selection of the adjusting mask being performed in accordance with the predetermined value of the electrical parameter.

公开(公告)号：EP1051693A1

公开(公告)日：2000-11-15

申请号：EP99900924.4

申请日：1999-01-15

Applicant: Gemplus

Inventor： COOREMAN, Pascal ,  RAYON, Stéphane ,  GOMEZ, Bertrand

IPC: G07F7/10 ,  G06K7/00

CPC classification number: G07F7/1008 ,  G06K7/0008 ,  G06Q20/341 ,  G07F7/084

Abstract: The invention relates to contact memory cards (16) essentially comprising a memory (10) and its approach circuits (12, 14). The invention is characterized in that the approach circuits of the memory are modified (20) to allow for writing in or reading the memory (10) by means of electrical signals supplied by the terminal (18) in accordance with an asynchronous communication protocol with verification of the integrity of the transmitted codes. The signals received at the contacts (16) are analysed by the circuit (22) and then directed to the address register (26) and data register (28) by the switch circuit (24). The circuit (22) and the control circuit (14) transmit messages and codes to the terminal (18) by way of a transmission circuit (34).

公开(公告)号：EP1051693B1

公开(公告)日：2003-05-28

申请号：EP99900924.4

申请日：1999-01-15

Applicant: Gemplus

Inventor： COOREMAN, Pascal ,  RAYON, Stéphane ,  GOMEZ, Bertrand

IPC: G07F7/10 ,  G06K7/00

CPC classification number: G07F7/1008 ,  G06K7/0008 ,  G06Q20/341 ,  G07F7/084

Abstract: The invention relates to contact memory cards (16) essentially comprising a memory (10) and its approach circuits (12, 14). The invention is characterized in that the approach circuits of the memory are modified (20) to allow for writing in or reading the memory (10) by means of electrical signals supplied by the terminal (18) in accordance with an asynchronous communication protocol with verification of the integrity of the transmitted codes. The signals received at the contacts (16) are analysed by the circuit (22) and then directed to the address register (26) and data register (28) by the switch circuit (24). The circuit (22) and the control circuit (14) transmit messages and codes to the terminal (18) by way of a transmission circuit (34).

公开(公告)号：EP1051689B1

公开(公告)日：2001-08-29

申请号：EP99900918.6

申请日：1999-01-14

Applicant: Gemplus

Inventor： RAYON, Stéphane ,  COOREMAN, Pascal ,  GOMEZ, Bertrand

IPC: G06K19/07

CPC classification number: G06K19/07

Abstract: The invention relates to cards containing microprocessors (10) and contacts (22) and is characterized in that an asynchronous communication device (40) is arranged between the contacts (22) and the microprocessor (10) such that it releases the microprocessor from communication tasks and thus allows for better use of the central unit (12) of the microprocessor (10) and of the associated memory elements (14, 16, 18). The device (40) essentially comprises an analysis circuit (34), a verification circuit (36) for verifying the integrity of the pulse trains, a circuit (38) for determining characters in the pulse trains and a plurality of registers (42, 44 and 46) which are connected to the microprocessor (10). The invention is for use with chip cards with microprocessors.

公开(公告)号：EP1051689A1

公开(公告)日：2000-11-15

申请号：EP99900918.6

申请日：1999-01-14

Applicant: Gemplus

Inventor： RAYON, Stéphane ,  COOREMAN, Pascal ,  GOMEZ, Bertrand

IPC: G06K19/07

CPC classification number: G06K19/07

Abstract: The invention relates to cards containing microprocessors (10) and contacts (22) and is characterized in that an asynchronous communication device (40) is arranged between the contacts (22) and the microprocessor (10) such that it releases the microprocessor from communication tasks and thus allows for better use of the central unit (12) of the microprocessor (10) and of the associated memory elements (14, 16, 18). The device (40) essentially comprises an analysis circuit (34), a verification circuit (36) for verifying the integrity of the pulse trains, a circuit (38) for determining characters in the pulse trains and a plurality of registers (42, 44 and 46) which are connected to the microprocessor (10). The invention is for use with chip cards with microprocessors.