公开(公告)号：EP1264338A1

公开(公告)日：2002-12-11

申请号：EP01913999.7

申请日：2001-03-13

Applicant: GEMPLUS ,  STMicroelectronics S.A.

Inventor： DELL'OVA, Francis ,  RIZZO, Pierre ,  LHERMET, Frank ,  POIROT, Dominique ,  RAYON, Stéphane ,  GOMEZ, Bertrand ,  LESSOILE, Nicole

IPC: H01L21/66 ,  H01L23/66

CPC classification number: H01L22/14 ,  H01L22/20 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention concerns a method for making an integrated electronic component arranged on a substrate wafer comprising at least two metallising steps. The invention is characterised in that the value of an electrical parameter of the component is determined after a metallising step, and one of the following metallising processes is carried out with an adjusting mask selected among n predefined masks to obtain a desired value of the parameter, the selection of the adjusting mask being performed in accordance with the predetermined value of the electrical parameter.