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公开(公告)号:AU2009201940B2
公开(公告)日:2013-11-07
申请号:AU2009201940
申请日:2009-05-15
Applicant: GEN ELECTRIC
Inventor: DE ROOIJ MICHAEL ANDREW , GLASER JOHN STANLEY
IPC: H02M7/00
Abstract: P-\WPIX)CS\AKW\Specetion \2009)\20540%62A Ic-5/11/2009 HIGH EFFICIENCY MULTI-SOURCE PHOTOVOLTAIC INVERTER A photovoltaic (PV) inverter system operates continuously in a buck converter mode to generate a sum of full wave rectified sine wave currents at a current node 5 common to a plurality of buck converters in response to a plurality of full wave rectified sine wave currents generated via the plurality of buck converters. The PV inverter system increases the level of the voltage sourcing each buck converter when a corresponding DC power source voltage is lower than the instantaneous voltage of a utility grid connected to the PV inverter system. U-2
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公开(公告)号:DE102010016611B4
公开(公告)日:2012-05-31
申请号:DE102010016611
申请日:2010-04-23
Applicant: GEN ELECTRIC
Inventor: CAIAFA ANTONIO , GLASER JOHN STANLEY , BEUPRE RICHARD ALFRED , NASADOSKI JEFFREY JOSEPH , SABATE JUAN ANTONIO
IPC: H03K17/687
Abstract: Gate-Treiberschaltung (60) zum Schalten eines Halbleiterbauelements (62) mit einem nicht isolierten Eingang, wobei die Gate-Treiberschaltung (60) aufweist: eine erste Schaltung (64), die dafür konfiguriert ist, das Halbleiterbauelement (62) einzuschalten, indem ein Strom auf einem Gate des Halbleiterbauelements (62) eingeprägt wird, um eine inhärente parasitäre Diode des Halbleiterbauelements (62) in Vorwärtsrichtung zu betreiben; und eine zweite Schaltung (66), die dafür konfiguriert ist, das Halbleiterbauelement (62) auszuschalten, indem ein Strom auf dem Gate des Halbleiterbauelements (62) eingeprägt wird, um die inhärente parasitäre Diode des Halbleiterbauelements (62) in Rückwärtsrichtung zu betreiben; wobei die erste Schaltung (64) mit dem Halbleiterbauelement (62) über einen ersten Schalter und die zweite Schaltung (66) mit dem Halbleiterbauelement (62) über einen zweiten Schalter als auch die zweite Schaltung (66) eine mit einem Kondensator über eine Diode verbundene Stromquelle enthält.
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公开(公告)号:GB2477171A
公开(公告)日:2011-07-27
申请号:GB201013913
申请日:2010-08-20
Applicant: GEN ELECTRIC
Inventor: GLASER JOHN STANLEY , DAVILA JUAN MANUEL RIVAS
Abstract: A push-pull inverter 600 has two single-ended EF2inverter sections 610, 620 coupled together with a shared ground and a partially shared tunable resonant network section 650 coupled to at least one load 660. Each inverter section comprises a switching section 630, 640 where both switching sections are switched at the same switching frequency, but with a phase difference of 180 degrees. The shared tunable network section allows independent tuning of an impedance seen by the corresponding switching section thereby independently tuning even and odd harmonics of the switching frequency. The resonant network may comprise first, second and third resonator sections 680, 685, 690.
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公开(公告)号:CA2712879A1
公开(公告)日:2011-02-28
申请号:CA2712879
申请日:2010-08-12
Applicant: GEN ELECTRIC
Inventor: GLASER JOHN STANLEY , RIVAS DAVILA JUAN MANUEL
IPC: H02M7/44
Abstract: A switching inverter having two single-ended EF2 inverter sections coupled together with a shared ground and partially shared tunable resonant network that is coupled to at least one load, wherein each inverter section comprises a switching section, and wherein the shared tunable network section allows independent tuning of an impedance seen by the corresponding switching section thereby independently tuning even and odd harmonics of the switching frequency.
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公开(公告)号:DE102010016611A1
公开(公告)日:2010-10-28
申请号:DE102010016611
申请日:2010-04-23
Applicant: GEN ELECTRIC
Inventor: CAIAFA ANTONIO , GLASER JOHN STANLEY , BEUPRE RICHARD ALFRED , NASADOSKI JEFFREY JOSEPH , SABATE JUAN ANTONIO
IPC: H03K17/687
Abstract: Eine Ausführungsform ist eine Gate-Treiberschaltung (60) zum Schalten eines Halbleiterbauelements (62) mit einem nicht isolierten Eingang, wobei die Gate-Treiberschaltung (60) eine erste Schaltung (64) besitzt, die dafür konfiguriert ist, das Halbleiterbauelement (62) einzuschalten, indem ein Strom auf einem Gate des Halbleiterbauelements (62) eingeprägt wird, um somit eine inhärente parasitäre Diode des Halbleiterbauelements (62) in Vorwärtsrichtung zu betreiben. Es ist eine zweite Schaltung (66) vorhanden, die dafür konfiguriert ist, das Halbleiterbauelement (62) auszuschalten, indem ein Strom auf dem Gate des Halbleiterbauelements eingeprägt wird, um somit die parasitäre Diode des Halbleiterbauelements (62) in Rückwärtsrichtung zu betreiben, wobei die erste Schaltung (64) und die zweite Schaltung (66) mit dem Halbleiterbauelement (62) über einen ersten Schalter bzw. einen zweiten Schalter verbunden sind.
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公开(公告)号:CA2678330A1
公开(公告)日:2010-03-19
申请号:CA2678330
申请日:2009-09-10
Applicant: GEN ELECTRIC
Inventor: DE ROOIJ MICHAEL ANDREW , GLASER JOHN STANLEY , MAYER OLIVER GERHARD , EL-BARBARI SAID FAROUK SAID
Abstract: A photovoltaic (PV) energy system (100) includes a pulsed bus (102) defined by a non-zero average value voltage that is proportional to a rectified utility grid AC supply voltage. The PV energy system (100) also includes a plurality of PV modules (106), each PV module (106) including a bucking circuit (108) configured to convert a corresponding PV voltage into a pulsing current (112), wherein the pulsating bus (102) is configured to sum the pulsing currents (112) produced via the plurality of PV modules (106) such that a resultant pulsing current is injected into the pulsating bus (102) in phase with the non-zero average value voltage. A current unfolding circuit (104) is configured to control the amount of AC current injected into the utility grid in response to the resultant pulsing current.
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公开(公告)号:BR102013032665A2
公开(公告)日:2016-03-15
申请号:BR102013032665
申请日:2013-12-18
Applicant: GEN ELECTRIC
Inventor: ROWDEN BRIAN LYNN , DELGADO ELADIO CLEMENTE , GLASER JOHN STANLEY
IPC: H01L23/02
Abstract: módulo de potência integrado e método de fabricação de um módulo de potência trata-se de um módulo de potência integrado (10) que inclui um substrato de metal isolado substancialmente plano (12) que tem pelo menos uma região recortada (18); pelo menos um substrato cerâmico substancialmente plano (14) disposto dentro da região de recorte, em que o substrato cerâmico é armado em pelo menos dois lados pelo substrato de metal isolado, sendo que o substrato cerâmico inclui uma primeira camada de metal (15) em um primeiro lado e uma segunda camada de metal (17) em um segundo lado pelo menos um dispositivo semicondutor de potência (20) acoplado ao primeiro lado do substrato cerâmico; pelo menos um dispositivo de controle (22) acoplado a uma primeira superfície do substrato de metal isolado; um revestimento de potência (60) que conecta eletricamente o pelo menos um dispositivo de potência de semicondutor e o pelo menos um dispositivo de controle; e um reservatório de fluido de resfriamento (58) conectado de modo operacional à segunda camada de metal do pelo menos um substrato cerâmico, em que uma pluralidade de passagens de fluido de resfriamento (54) é fornecida no reservatório de fluido de resfriamento.
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公开(公告)号:AU2009202490B2
公开(公告)日:2013-12-05
申请号:AU2009202490
申请日:2009-06-22
Applicant: GEN ELECTRIC
Abstract: PIWPDOCS\KMH(X) Specficanons\20556300 - I medmens i June 2(9 doc I M 96209 HIGH EFFICIENCY PHOTOVOLTAIC INVERTER A photovoltaic (PV) inverter (30) includes a single DC to AC converter configured to operate solely in a buck mode for PV array voltage levels greater than a connected power 5 grid instantaneous voltage plus converter margin, and further configured to operate solely in a boost mode for PV array voltage levels plus margin less than the connected power grid instantaneous voltage, such that the PV inverter (30) generates a rectified sine wave current (32) in response to the available PV array (12) power, and further such that the PV inverter (30) generates a utility grid (14) current in response to the rectified sine wave 10 current (32).
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公开(公告)号:GB2477171B
公开(公告)日:2012-03-07
申请号:GB201013913
申请日:2010-08-20
Applicant: GEN ELECTRIC
Inventor: GLASER JOHN STANLEY , DAVILA JUAN MANUEL RIVAS
Abstract: A switching inverter having two single-ended EF2 inverter sections coupled together with a shared ground and partially shared tunable resonant network that is coupled to at least one load, wherein each inverter section comprises a switching section, and wherein the shared tunable network section allows independent tuning of an impedance seen by the corresponding switching section thereby independently tuning even and odd harmonics of the switching frequency.
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公开(公告)号:CA2700013A1
公开(公告)日:2010-10-27
申请号:CA2700013
申请日:2010-04-15
Applicant: GEN ELECTRIC
Inventor: CAIAFA ANTONIO , NASADOSKI JEFFREY JOSEPH , GLASER JOHN STANLEY , SABATE JUAN ANTONIO , BEUPRE RICHARD ALFRED
IPC: H03K17/687 , H03K17/60
Abstract: One embodiment is a gate drive circuitry (60) for switching a semiconductor device (62) having a non-isolated input, the gate drive circuitry (60) having a first circuitry (64) configured to turn-on the semiconductor device (62) by imposing a current on a gate of the semiconductor device (62) so as to forward bias an inherent parasitic diode of the semiconductor device (62). There is a second circuitry (66) configured to turn--off the semiconductor device (62) by imposing a current on the gate of the semiconductor device (62) so as to reverse bias the parasitic diode of the semiconductor device (62) wherein the first circuitry (64) and the second circuitry (66) are coupled to the semiconductor device (62) respectively through a first switch and a second switch.
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