公开(公告)号：US20250164707A1

公开(公告)日：2025-05-22

申请号：US18513147

申请日：2023-11-17

Applicant: GlobalFoundries U.S. Inc.

Inventor： Arpan Dasgupta ,  Kevin Dezfulian ,  Yusheng Bian ,  Norman Robson ,  Brittany Hedrick ,  Thomas Houghton ,  Kenneth J. Giewont ,  Koushik Ramachandran ,  Daniel W. Fisher

IPC: G02B6/42

Abstract: Structures for a photonics chip that enable external communication and methods of forming such structures. The structure comprises a spot-size converter, a body on a semiconductor substrate, and a dielectric layer on the semiconductor substrate. The body includes a surface adjacent to the spot-size converter and a reflector on the surface. The dielectric layer includes a recess disposed above the spot-size converter and the reflector.

公开(公告)号：US20240369760A1

公开(公告)日：2024-11-07

申请号：US18141753

申请日：2023-05-01

Applicant: GlobalFoundries U.S. Inc.

Inventor： Arpan Dasgupta ,  Zahidur Chowdhury ,  Takako Hirokawa ,  Vaishnavi Karra ,  Norman Robson

IPC: G02B6/12 ,  G02B6/136 ,  H04N5/33

Abstract: Structures including a light source and an edge coupler, and methods of forming and using such structures. The structure comprises a semiconductor substrate and a back-end-of-line stack on the semiconductor substrate. The back-end-of-line stack includes a first dielectric layer, a first plurality of metal features in the first dielectric layer, a second dielectric layer on the first dielectric layer, and a second plurality of metal features in the second dielectric layer. The second plurality of metal features have a non-overlapping relationship with the first plurality of metal features. The structure further comprises an edge coupler adjacent to the first plurality of metal features and the second plurality of metal features.

公开(公告)号：US20240329308A1

公开(公告)日：2024-10-03

申请号：US18127220

申请日：2023-03-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： Arpan Dasgupta ,  Yusheng Bian ,  John M. Safran ,  Norman Robson

IPC: G02B6/122 ,  G02B6/13

CPC classification number: G02B6/1228 ,  G02B6/13

Abstract: Structures including multiple photonics chips and methods of fabricating a structure including multiple photonics chips. The structure comprises a first chip including a first edge and a first plurality of optical couplers disposed at the first edge, and a second chip including a second edge adjacent to the first edge of the first chip and a second plurality of optical couplers. The second plurality of optical couplers are disposed at the second edge adjacent to the first plurality of optical couplers.