公开(公告)号：EP4421849A1

公开(公告)日：2024-08-28

申请号：EP23201754.1

申请日：2023-10-05

Applicant: GlobalFoundries U.S. Inc.

Inventor： Zhao, Zhixing ,  Kleimaier, Dominik M. ,  Duenkel, Stefan

IPC: H01L21/28 ,  G11C11/22 ,  H01L29/423 ,  H01L29/51 ,  H01L29/78 ,  H10B51/30

CPC classification number: H10B51/30 ,  H01L29/516 ,  H01L29/513 ,  H01L29/42368 ,  H01L29/6684 ,  H01L29/7833 ,  H01L29/78391 ,  H01L29/40111 ,  G11C11/223 ,  G11C11/5657 ,  G11C11/2273 ,  G11C11/2275

Abstract: A ferroelectric memory device (100) includes a substrate (110) including a source region (120) and a drain region (130), and a gate structure (140) disposed over the substrate. The gate structure includes a gate electrode (146) including a plurality of electrode portions (146', 146'') arranged in a first direction parallel to a top surface of the substrate, an oxide layer (142) including a plurality of oxide portions (142', 142'') corresponding respectively to the plurality of electrode portions, and a ferroelectric layer (144) disposed between the gate electrode and the oxide layer along a second direction perpendicular to the first direction and including a plurality of ferroelectric portions (144', 144'') corresponding respectively to the plurality of oxide portions. A least one of the plurality of oxide portions and at least one of the plurality of ferroelectric portions have different thicknesses along the second direction.