公开(公告)号：EP4517722A1

公开(公告)日：2025-03-05

申请号：EP24159005.8

申请日：2024-02-22

Applicant: GlobalFoundries U.S. Inc.

Inventor： Pritchard, David Charles ,  Raghavan, Ramesh ,  Ranganathan, Thirunavukkarasu ,  Tummuru, Rajesh Reddy ,  Ramadout, Benoit Francois Claude ,  Pirro, Luca

IPC: G09C1/00 ,  H04L9/08 ,  H04L9/32 ,  H10B10/00

Abstract: Embodiments of the disclosure provide a structure and related method for a gate over semiconductor regions that are not aligned. Structures according to the disclosure include a first semiconductor region extending from a first widthwise end to a second widthwise end within a substrate. A second semiconductor region is adjacent the first semiconductor region and extends from a first widthwise end to a second widthwise end within the substrate. The second widthwise end of the second semiconductor region is non-aligned with the second widthwise end of the first semiconductor region. A gate structure is over the substrate and extends widthwise over the first semiconductor region and the second semiconductor region.