公开(公告)号：WO2017010991A1

公开(公告)日：2017-01-19

申请号：PCT/US2015/040287

申请日：2015-07-14

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： LESARTRE, Gregg B

IPC: G11C11/56 ,  G11C13/00 ,  G11C7/10

CPC classification number: G11C13/0069 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0023 ,  G11C13/004 ,  G11C13/0064 ,  G11C2013/0045 ,  G11C2013/0076 ,  G11C2013/0078 ,  G11C2013/009 ,  G11C2013/0092 ,  G11C2213/15 ,  G11C2213/77

Abstract: Example implementations relate to writing a desired memory value to a target memory element in a cross-point array of memory elements. For example, a desired memory value for the target memory element may be received, and a sneak current measurement for the target memory element may be received. A first write strength for writing the desired memory value to the target memory element may be determined based on the sneak current measurement.

Abstract translation: 示例性实现涉及将期望的存储器值写入存储器元件的交叉点阵列中的目标存储器元件。 例如，可以接收目标存储器元件的期望的存储器值，并且可以接收目标存储器元件的潜行电流测量。 可以基于潜行电流测量来确定用于将期望的存储器值写入目标存储器元件的第一写入强度。

公开(公告)号：WO2016204766A1

公开(公告)日：2016-12-22

申请号：PCT/US2015/036438

申请日：2015-06-18

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： LESARTRE, Gregg B ,  SHERLOCK, Derek Alan ,  HERRELL, Russ W.

IPC: G06F13/16 ,  G06F12/10

CPC classification number: G06F12/1063 ,  G06F9/3004 ,  G06F9/5016 ,  G06F12/1027 ,  G06F12/1475 ,  G06F13/16 ,  G06F21/6218

Abstract: In example implementations, mapping fields and respective operation fields may be stored in a translation lookaside buffer (TLB) of a central processing unit (CPU) that is communicatively coupled to a storage volume. The operation fields may be populated based on processes, running on the CPU, corresponding to the respective mapping fields. In response to a storage volume access request generated by one of the processes, and based on contents of one of the mapping fields that matches the storage volume access request, a memory address corresponding to a memory location in the storage volume may be identified. A translated address based on the identified memory address, and contents of the respective operation field, may be transmitted to a media controller communicatively coupled to the CPU and the storage volume.

Abstract translation: 在示例实现中，映射字段和相应的操作字段可以存储在通信地耦合到存储卷的中央处理单元（CPU）的翻译后备缓冲器（TLB）中。 可以基于在CPU上运行的对应于各个映射字段的进程来填充操作字段。 响应于由其中一个进程产生的存储卷访问请求，并且基于与存储卷访问请求匹配的映射字段之一的内容，可以识别与存储卷中的存储器位置相对应的存储器地址。 基于所识别的存储器地址的翻译地址和相应操作字段的内容可以被发送到通信地耦合到CPU和存储卷的媒体控制器。

公开(公告)号：WO2018217960A1

公开(公告)日：2018-11-29

申请号：PCT/US2018/034242

申请日：2018-05-23

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： MCDONALD, Nicholas George ,  GOSTIN, Gary ,  EMMOT, Darel N ,  LESARTRE, Gregg B ,  DAVIS, Al ,  SHERLOCK, Derek Alan

IPC: H04L12/935

Abstract: Examples relate to virtual channel routing in networks considering VC actions to be performed by the packets while routed through the network. A packet is received at an input port of a network device of a network and an output port and a VC action is determined from a routing table associated to the input port based on a packet's destination network device. A VC mask is determined from a Virtual Channel Action Table (VCAT), associated to the routing table, based on a packet's ingress VC and the VC action. A particular VC among the set of VCs defined in the VC mask is selected and the packet is routed to the destination network device using the output port and the particular VC.