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    LOGIC CIRCUITRY PACKAGE FOR PRINT APPARATUS
    1.
    发明申请
    LOGIC CIRCUITRY PACKAGE FOR PRINT APPARATUS 审中-公开

    公开(公告)号：WO2021221678A1

    公开(公告)日：2021-11-04

    申请号：PCT/US2020/030860

    申请日：2020-04-30

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： WARD, Jefferson P. ,  PANSHIN, Stephen D. ,  MICHEL, Kyle

    IPC: G06F21/44 ,  G06F21/60 ,  G06F21/64 ,  G06F21/72 ,  H04L9/32

    Abstract: A logic circuitry package for a print apparatus includes a serial data bus interface to interface with a serial data bus, the logic circuit to respond to messages from the print apparatus over the serial data bus directed to a number of different addresses using different component keys for cryptographic authentication corresponding to each different address, the different component keys related to at least one master key of the print apparatus. The logic circuitry package further includes control logic which, in response to a session initiation request message on the serial data bus from the print apparatus, is to establish a secure communication session related to one of the different addresses, the control logic to cryptographically authenticate responses to each subsequent message of the secure communication session from the print apparatus using a component key corresponding to the address.

    LOGIC CIRCUITRY
    2.
    发明申请
    LOGIC CIRCUITRY 审中-公开

    公开(公告)号：WO2020117297A1

    公开(公告)日：2020-06-11

    申请号：PCT/US2019/017511

    申请日：2019-02-11

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： PANSHIN, Stephen D. ,  LINN, Scott A.

    IPC: G06F13/42 ,  B41J2/175

    Abstract: A logic circuitry package for association with a replaceable print apparatus component comprises: logic and a serial data bus interface, wherein the serial data bus interface is to interface with a serial data bus of a print apparatus, and, wherein the logic is, in response to a first command sent to the logic circuitry package via the serial data bus connected to the serial data bus interface, the first command including a time period, to generate a low voltage condition on the serial data bus for a duration based on the time period, and, after the duration, return to a default voltage condition on the serial data bus.

    LOGIC CIRCUITRY
    9.
    发明申请
    LOGIC CIRCUITRY 审中-公开

    公开(公告)号：WO2022086538A1

    公开(公告)日：2022-04-28

    申请号：PCT/US2020/056847

    申请日：2020-10-22

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： PANSHIN, Stephen D.

    IPC: G06F9/54 ,  G06F15/17

    Abstract: A logic circuit including a data interface to transmit communications is provided. The logic circuit may be configured to, in response to a task command over the data interface, the task command including (i) a task parameter and (ii) a time parameter of zero, execute a task of the task parameter for a predetermined time period, and/or, execute the task while not responding to communications of the first protocol.

    LOGIC CIRCUITRY PACKAGE
    10.
    发明申请
    LOGIC CIRCUITRY PACKAGE 审中-公开

    公开(公告)号：WO2021080620A1

    公开(公告)日：2021-04-29

    申请号：PCT/US2019/058189

    申请日：2019-10-25

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： GARDNER, James Michael ,  PANSHIN, Stephen D.

    IPC: B41J2/175 ,  G06K15/00

    Abstract: A logic circuitry package for a replaceable print apparatus component includes an interface including a power terminal and at least one logic circuit. The at least one logic circuit is configured to respond to communications sent to a first address via the interface and respond to communications sent to a second address via the interface. The at least one logic circuit is configured to in response to a first command sent to the first address, draw a first current on the power terminal; and in response to a hibernate command sent to the first address, respond to communications sent to the second address and draw a second current on the power terminal less than the first current.

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