公开(公告)号：FR2472778B1

公开(公告)日：1988-05-13

申请号：FR8027376

申请日：1980-12-23

Applicant: HONEYWELL INF SYSTEMS

Inventor： TWIBELL JEROME J ,  CRAWFORD KNUTE S

IPC: G06F13/42 ,  G06F13/12 ,  G06F13/14 ,  G06F13/16 ,  G06F13/372 ,  G06F13/40 ,  G06F3/00

公开(公告)号：DE3276730D1

公开(公告)日：1987-08-13

申请号：DE3276730

申请日：1982-03-12

Applicant: HONEYWELL INF SYSTEMS

Inventor： TWIBELL JEROME J ,  JOHNSTON ROBERT J

IPC: G06F7/78 ,  G06F15/16 ,  G06F13/00

公开(公告)号：MX150734A

公开(公告)日：1984-07-06

申请号：MX19182582

申请日：1982-03-16

Applicant: HONEYWELL INF SYSTEMS

Inventor： TWIBELL JEROME J ,  JOHNSTON ROBERT J

IPC: H04M7/00

公开(公告)号：CA1095630A

公开(公告)日：1981-02-10

申请号：CA274068

申请日：1977-03-16

Applicant: HONEYWELL INF SYSTEMS

Inventor： CALLE JAIME ,  GARVEY ROBERT J ,  MONAHAN EARNEST M ,  PARRIS GEORGE L ,  TWIBELL JEROME J ,  WOODS JOHN M

IPC: G06F11/20 ,  G06F15/177 ,  G06F9/02 ,  G06F13/00

Abstract: An automatic reconfiguration hardware capability for automatically altering the local memory/processor configuration and reinitiating a bootload sequence in the event of a failure in the start-up phase of the input/output processor bootload. The automatic reconfiguration logic is enabled when a bootload request originates from the system console or the central system. Once a bootload request is initiated, all possible local memory/inputoutput processor (IOPP) configurations are attempted without further manual intervention. If no configuration is successful, a bootload error indication is presented at the IOP configuration panel.

公开(公告)号：AU553946B2

公开(公告)日：1986-07-31

申请号：AU8099682

申请日：1982-03-02

Applicant: HONEYWELL INF SYSTEMS

Inventor： TWIBELL JEROME J

IPC: G06F13/12 ,  G06F13/00

公开(公告)号：DE2755952A1

公开(公告)日：1978-07-06

申请号：DE2755952

申请日：1977-12-15

Applicant: HONEYWELL INF SYSTEMS

Inventor： TWIBELL JEROME J ,  GRISWOLD VICTOR MICHAEL ,  CALLE JAIME

IPC: H01H43/00 ,  G04F3/00 ,  G06F13/26 ,  G06F3/00 ,  G06F9/18

公开(公告)号：DE2721319A1

公开(公告)日：1977-12-01

申请号：DE2721319

申请日：1977-05-12

Applicant: HONEYWELL INF SYSTEMS

Inventor： CALLE JAIME ,  GARVEY ROBERT J ,  MONAHAN EARNEAST M ,  PARRIS GEORGE L ,  TWIBELL JEROME J ,  WOODS JOHN M

IPC: G06F11/20 ,  G06F15/177 ,  G06F9/18

公开(公告)号：MX154248A

公开(公告)日：1987-06-26

申请号：MX19181282

申请日：1982-03-15

Applicant: HONEYWELL INF SYSTEMS

Inventor： TWIBELL JEROME J

IPC: H01J1/10

公开(公告)号：AU551651B2

公开(公告)日：1986-05-08

申请号：AU8071982

申请日：1982-02-23

Applicant: HONEYWELL INF SYSTEMS

Inventor： TWIBELL JEROME J ,  JOHNSTON ROBERT J

IPC: G06F7/78 ,  G11C9/00

公开(公告)号：CA1174371A

公开(公告)日：1984-09-11

申请号：CA400373

申请日：1982-04-02

Applicant: HONEYWELL INF SYSTEMS

Inventor： TWIBELL JEROME J

IPC: G06F13/12 ,  G06F9/36 ,  G06F3/04

Abstract: In an input/output multiplexer coupling a central subsystem and peripheral subsystems, a central subsystem data distributor for receiving signal groups from the central subsystem and distributing reformatted signal groups to other components of the input/output multiplexer. The central subsystem data distributor includes apparatus for reformatting data signal groups in response to control signals and includes apparatus for replacing an index number with a previously established peripheral subsystem address. Apparatus is provided to identify signal group destinations and provide activation signals for transfer of the signal groups to predetermined apparatus. The apparatus is adapted to transfer signal groups through the central subsystem data distributor in three clock cycles to ensure efficient transfer within the multiplexer.