OPTICAL TRANSCEIVER
    1.
    发明申请
    OPTICAL TRANSCEIVER 审中-公开
    光收发器

    公开(公告)号:WO2004054139A3

    公开(公告)日:2004-09-16

    申请号:PCT/US0339685

    申请日:2003-12-11

    CPC classification number: H04B10/806 H04B10/40 Y10T29/49124

    Abstract: An optical transceiver for detecting an incoming light beam and for transmitting an outgoing light beam along a common optical axis is provided. Such an optical transceiver provides a compact optical transceiver that is suitable for a wide variety of applications.

    Abstract translation: 提供了一种用于检测入射光束并且用于沿公共光轴传输出射光束的光学收发器。 这种光学收发器提供适用于各种应用的紧凑型光学收发器。

    METHODS OF CONDUCTING WAFER LEVEL BURN-IN OF ELECTRONIC DEVICES
    3.
    发明申请
    METHODS OF CONDUCTING WAFER LEVEL BURN-IN OF ELECTRONIC DEVICES 审中-公开
    导电水平电子装置的方法

    公开(公告)号:WO03017326A3

    公开(公告)日:2003-05-15

    申请号:PCT/US0225640

    申请日:2002-08-12

    Abstract: Methods of conducting wafer level burn-in (WLBI) of semiconductor devices are presented wherein systems are provided having at least two electrodes (210, 215). Electrical bias (920) and/or thermal power (925) is applied on each side of a wafer (100) having back and front electrical contacts for semiconductor devices borne by the wafer. A pliable conductive layer (910) is described for supplying pins on the device side of a wafer with electrical contact and/or also for providing protection to the wafer from mechanical pressure being applied to its surfaces. Use of a cooling system (950) is also described for enabling the application of a uniform temperature to a wafer undergoing burn-in. Wafer level burn-in is performed by applying electrical and physical contact (915) using an upper contact plate to individual contacts for the semiconductor devices ; applying electrical and physical contact using a lower contact plate (910) to a substrate surface of said semiconductor wafer ; providing electrical power (920) to said semiconductor devices through said upper and lower second contact plates from a power source coupled to said upper and lower contacts plates ; monitoring and controlling electrical power (935) to said semiconductor devices for a period in accordance with a specified burn-in criteria ; removing electrical power at completion of said period (955) ; and removing electrical and physical contact to said semiconductor wafer (965).

    Abstract translation: 提供了进行半导体器件的晶片级老化(WLBI)的方法,其中提供具有至少两个电极(210,215)的系统。 电晶体(920)和/或热功率(925)施加在具有由晶片承载的半导体器件的背面和前部电触点的晶片(100)的每一侧上。 描述了一种柔性导电层(910),用于在具有电接触的晶片的器件侧上提供引脚和/或用于为施加到其表面的机械压力提供对晶片的保护。 还描述了使用冷却系统(950),以使得能够对经历老化的晶片施加均匀的温度。 通过使用上接触板向半导体器件的单个触点施加电和物理接触(915)来执行晶片级老化; 使用下接触板(910)将电和物理接触施加到所述半导体晶片的衬底表面; 通过所述上和下第二接触板从耦合到所述上和下接触板的电源向所述半导体器件提供电力(920); 根据指定的老化标准对所述半导体器件监测和控制电力(935)一段时间; 在所述期间完成时移除电力(955); 以及去除与所述半导体晶片(965)的电和物理接触。

    METAMORPHIC LONG WAVELENGTH HIGH-SPEED PHOTODIODE
    4.
    发明申请
    METAMORPHIC LONG WAVELENGTH HIGH-SPEED PHOTODIODE 审中-公开
    元波长波长高光照

    公开(公告)号:WO02058162A2

    公开(公告)日:2002-07-25

    申请号:PCT/US0201969

    申请日:2002-01-22

    Abstract: A method and apparatus for fabricating a metamorphic long-wavelength, high-speed photodiode, wherein a buffer layer matching a substrate lattice constant is formed at normal growth temperatures and a thin grading region which grades past the desired lattice constant is configured at a low temperature. A reverse grade back is performed to match a desired lattice constant. Thereafter, a thick layer is formed thereon, based on the desired lattice constant. Annealing can then occur to isolate dislocated mater5ial in a grading layer and a reverse grading layer. Thereon a strained layer superlattice substrate is created upon which a high-speed photodiode can be formed. Implant or diffusion layers grown in dopants can be formed based on materials, such as Be, Mg, C, Te, Si, Se, Zn, or others a metal layer can be formed over a cap above a P+ region situated directly over an N-active region. The active region also includes a p-doped region. The high-speed photodiode can thus be formed utilizing GaAs, or other substrate material, such as germanium and silicon.

    Abstract translation: 一种用于制造变质长波长高速光电二极管的方法和装置,其中在正常生长温度下形成与衬底晶格常数匹配的缓冲层,并且在低温下配置等级超过所需晶格常数的薄分级区域 。 执行反向退化以匹配所需的晶格常数。 此后,基于所需的晶格常数,在其上形成厚层。 然后可以发生退火以在分级层和反向分级层中分离脱位的物质。 在其上形成了可以形成高速光电二极管的应变层超晶格衬底。 在掺杂剂中生长的植入物或扩散层可以基于诸如Be,Mg,C,Te,Si,Se,Zn等材料形成,或者可以在直接位于N上的P +区域上方的帽上方形成金属层 活性区域。 有源区还包括p掺杂区。 因此,高速光电二极管可以利用GaAs或其他衬底材料,例如锗和硅来形成。

    METHOD AND APPARATUS FOR MONITORING THE POWER OF A MULTI-WAVELENGTH OPTICAL SIGNAL
    5.
    发明申请
    METHOD AND APPARATUS FOR MONITORING THE POWER OF A MULTI-WAVELENGTH OPTICAL SIGNAL 审中-公开
    用于监测多波长光信号功率的方法和装置

    公开(公告)号:WO03103203A2

    公开(公告)日:2003-12-11

    申请号:PCT/US0317523

    申请日:2003-06-04

    Abstract: Methods and apparatus for monitoring the power level of a multi-wavelength optical signal are provided, making use of a light detector comprising a first and a second absorbing layer having both the same conductivity type, and intermediate layer of a second conductivity type and means for providing an indication of a change in power of the first and/or the second wavelength of light as measured by the respective absorbing layers. Also provided are methods and apparatus for adjusting the power level of selected optical emitters to compensate for the changes in power levels. An optoelectronic transmitter for receiving electrical input signals and transmitting corresponding optical output signals in a common light beam comprises electrical modulators, optoelectronic emitters, an optical combiner, an optoelectronic detector, means for separating the signals detected by the detector, and means for adjusting the power of the optoelectronic emitters.

    Abstract translation: 提供了用于监测多波长光信号的功率电平的方法和装置,利用包括具有相同导电类型的第一和第二吸收层以及第二导电类型的中间层的光检测器,以及用于 提供由各个吸收层测量的第一和/或第二波长光的功率变化的指示。 还提供了用于调整所选择的光发射器的功率电平以补偿功率电平变化的方法和装置。 用于接收电输入信号并在公共光束中传输相应光输出信号的光电发射器包括电调制器,光电子发射器,光组合器,光电检测器,用于分离由检测器检测的信号的装置,以及用于调节功率的装置 的光电子发射器。

    PROVIDING CURRENT CONTROL OVER WAFER BORNE SEMICONDUCTOR DEVICES USING TRENCHES
    6.
    发明申请
    PROVIDING CURRENT CONTROL OVER WAFER BORNE SEMICONDUCTOR DEVICES USING TRENCHES 审中-公开
    通过使用TRENCHES的波形BORNE半导体器件提供电流控制

    公开(公告)号:WO03017325A2

    公开(公告)日:2003-02-27

    申请号:PCT/US0225639

    申请日:2002-08-12

    Abstract: Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1500) having a substrate (1520), at least one active layer (1565) and a surface layer (1510), and electrical contacts (1515) formed on said surface layer (1510). Current control can be achieved with the formation of trenches (1525) around electrical contacts, where electrical contacts and associated layers define an electronic device. Insulating implants (1530) can be placed into trenches (1525) and/or sacrificial layers (1540) can be formed between electronic contacts (1515). Trenches control current by promoting current flow within active (e.g., conductive) regions (1560) and impeding current flow through inactive (e.g., nonconductive) regions (1550). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.

    Abstract translation: 公开了一种用于向具有衬底(1520),至少一个有源层(1565)和表面层(1510)的半导体晶片(1500)提供晶片寄生电流控制的方法以及形成在所述表面层上的电触头(1515) (1510)。 可以通过在电触点周围形成沟槽(1525)来实现电流控制,其中电触点和相关层限定电子装置。 绝缘植入物(1530)可以放置在沟槽(1525)中,并且可以在电子触点(1515)之间形成牺牲层(1540)。 沟槽通过促进在有源(例如,导电)区域(1560)内的电流流动并阻止电流通过非活性(例如非导电)区域(1550)来控制电流。 还公开了半导体器件的晶片级老化(WLBI)的方法和系统。 使用WLBI方法和系统时,晶圆级的电流控制很重要。

    SYSTEM AND METHOD FOR OPTICALLY SENSING MOTION OF OBJECTS
    7.
    发明申请
    SYSTEM AND METHOD FOR OPTICALLY SENSING MOTION OF OBJECTS 审中-公开
    用于光学感测运动的系统和方法

    公开(公告)号:WO0245214A3

    公开(公告)日:2002-11-28

    申请号:PCT/US0144401

    申请日:2001-11-26

    CPC classification number: H01S5/0262 H01S5/423

    Abstract: A multiple laser optical sensing system and method for detecting target characteristics are disclosed. The system includes a laser source with at least two emission apertures from which laser signals are emitted. The system also includes at least one detector, which is operationally responsive to the laser source. Finally, the system includes a microprocessor that is operationally coupled to the detector(s). In operation, the laser source emits into an environment at least two laser signals, one from each emission aperture. The detector detects the laser signals after the signals pass through the environment, which is occupied by a target, and the microprocessor determines target characteristics based on the laser signals received by the detectors.

    Abstract translation: 公开了一种用于检测目标特性的多重激光光学传感系统和方法。 该系统包括具有至少两个发射孔径的激光源,激光信号从该发射孔径发射出去。 该系统还包括至少一个检测器,其可操作地响应激光源。 最后,该系统包括可操作地耦合到检测器的微处理器。 在操作中,激光源发射至少两个激光信号的环境,每个发射光圈一个。 检测器在信号通过由目标占据的环境之后检测激光信号,并且微处理器基于由检测器接收的激光信号来确定目标特性。

    SYSTEM AND METHOD FOR VCSEL POLARIZATION CONTROL
    8.
    发明申请
    SYSTEM AND METHOD FOR VCSEL POLARIZATION CONTROL 审中-公开
    用于VCSEL偏振控制的系统和方法

    公开(公告)号:WO0191257A3

    公开(公告)日:2002-06-06

    申请号:PCT/US0116390

    申请日:2001-05-22

    Abstract: A system and method for VCSEL (vertical cavity surface emitting laser) polarization control is disclosed, including methods and apparatus comprising a component package (302, 304) having self-aligning features (316, 318), for indicating an alignment axis (320, 322), and upper surface aperture (314) formed therein, a vertical cavity surface emitting laser device (308) having two emission polarizations (204) normal to one another, disposed within the component package and aligned such that each emission polarization is at about 45 degrees with respect to the alignment axis, and a linear polarization element (400, 402, 406) having a polarization direction (206), spanning the aperture and disposed such that the polarization direction is parallel to the alignment axis.

    Abstract translation: 公开了一种用于VCSEL(垂直腔表面发射激光)偏振控制的系统和方法,包括包括具有自对准特征(316,318)的部件封装(302,304)的方法和装置,用于指示对准轴线(320,3304) 322)和形成在其中的上表面孔(314),具有彼此垂直的两个发射偏振(204)的垂直腔表面发射激光器件(308),其布置在所述部件封装内并对齐,使得每个发射极化在约 以及具有偏振方向(206)的线偏振元件(400,402,406),跨越所述孔并被设置为使得所述偏振方向平行于所述对准轴线。

    SINGLE MODE VCSEL
    9.
    发明申请
    SINGLE MODE VCSEL 审中-公开
    单模VCSEL

    公开(公告)号:WO2004036707A3

    公开(公告)日:2004-06-24

    申请号:PCT/US0327685

    申请日:2003-09-02

    Abstract: A VCSEL (100) having a metallic heat spreading layer (128) adjacent a semiconductor buffer layer (122) containing an insulating structure (124). The heat spreading layer (128) includes an opening (130) that enables light emitted by an active region (120) to reflect from a distributed Bragg reflector (DBR) top mirror (132) located above the heat spreading layer (128). A substrate (112) is below the active region (120). A lower contact (114) provides electrical current to that substrate (112). The lower contact (114) includes an opening (115) that enables light emitted from the active region (120) to reflect from a distributed Bragg reflector (DBR) lower mirror (116). Beneficially, the substrate (112) includes a slot that enables light to pass through an opening in the lower contact (114). That slot acts as an alignment structure that enables optical alignment of an external feature to the VCSEL (100).

    Abstract translation: 具有邻近包含绝缘结构(124)的半导体缓冲层(122)的金属散热层(128)的VCSEL(100)。 散热层(128)包括使有源区域(120)发射的光能够从位于散热层(128)上方的分布式布拉格反射镜(DBR)上反射镜(132)反射的开口(130)。 衬底(112)位于有源区(120)的下方。 下触点(114)向该基板(112)提供电流。 下触点(114)包括使从有源区域(120)发射的光能够从分布式布拉格反射器(DBR)下反射镜(116)反射的开口(115)。 有利地,衬底(112)包括使光能够穿过下触点(114)中的开口的狭槽。 该槽充当对准结构,其使外部特征能够对准VCSEL(100)。

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