CIRCUIT SUBSTRATE AND METHOD FOR MANUFACTURING CIRCUIT SUBSTRATE
    1.
    发明申请
    CIRCUIT SUBSTRATE AND METHOD FOR MANUFACTURING CIRCUIT SUBSTRATE 审中-公开
    电路基板和制造电路基板的方法

    公开(公告)号:US20150359090A1

    公开(公告)日:2015-12-10

    申请号:US14731636

    申请日:2015-06-05

    Inventor: Satoshi WATANABE

    CPC classification number: H05K3/3452 H05K3/0097 H05K3/4661

    Abstract: A circuit substrate includes an insulating layer, a conductor layer laminated on the insulating layer and including a plane layer portion, and a solder resist layer formed on the insulating layer such that the solder resist layer is covering the conductor layer. The plane layer portion of the conductor layer has recess portions or opening portions, and the solder resist layer includes recessed portions covering the recess portions or opening portions of the plane layer portion.

    Abstract translation: 电路基板包括绝缘层,层叠在绝缘层上并包括平面层部分的导体层和形成在绝缘层上的阻焊层,使得阻焊层覆盖导体层。 导体层的平面层部具有凹部或开口部,阻焊层包括覆盖平面层部的凹部或开口部的凹部。

    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD
    2.
    发明申请
    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD 审中-公开
    印刷线路板和制造印刷线路板的方法

    公开(公告)号:US20140116759A1

    公开(公告)日:2014-05-01

    申请号:US14064401

    申请日:2013-10-28

    Inventor: Satoshi WATANABE

    Abstract: A method for manufacturing a printed wiring board includes fixing a lower metal foil on a support plate, forming a lower insulating layer on the lower metal foil, laminating a core metal layer on the lower insulating layer, patterning the core metal layer such that the core metal layer is formed into a core conductive layer, forming an upper insulating layer on the core conductive layer and lower insulating layer, laminating an upper metal foil on the upper insulating layer, removing the plate from the lower foil such that a core substrate including the lower metal foil, lower insulating layer, core conductive layer, upper insulating layer and upper metal foil is formed, and forming on the core substrate a buildup layer including an insulating layer and a conductive layer. The core metal layer has a thickness which is set to be greater than thicknesses of the lower and upper foils.

    Abstract translation: 一种制造印刷电路板的方法,包括将下金属箔固定在支撑板上,在下金属箔上形成下绝缘层,在下绝缘层上层叠芯金属层,图案化芯金属层,使芯体 金属层形成为芯导电层,在芯导电层和下绝缘层上形成上绝缘层,在上绝缘层上层叠上金属箔,从下箔去除板,使得包含 形成下金属箔,下绝缘层,芯导电层,上绝缘层和上金属箔,并且在芯基板上形成包括绝缘层和导电层的积层。 芯金属层的厚度被设定为大于下箔和上箔的厚度。

    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD
    3.
    发明申请
    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD 有权
    印刷线路板和制造印刷线路板的方法

    公开(公告)号:US20140083746A1

    公开(公告)日:2014-03-27

    申请号:US14039895

    申请日:2013-09-27

    Inventor: Satoshi WATANABE

    Abstract: A printed wiring board includes multiple insulating layers laminated on each other and each including resin and core, the insulating layers having first-surface sides and second-surface sides on the opposite side, respectively, and including multiple first insulating and second insulating layers, multiple first-surface-side conductive layers formed on the first-surface sides of the first insulating layers, respectively, multiple second-surface-side conductive layers formed on the second-surface sides of the second insulating layers, respectively. The insulating layers include one or more insulating layer having the core positioned such that the core is shifted toward the first-surface side from the center in the thickness direction, the insulating layers include a central insulating layer positioned in the center of the insulating layers, and the first-surface-side and second-surface-side conductive layers are formed such that the first-surface side conductive layers have the total area which is set smaller than the total area of the second-surface-side conductive layers.

    Abstract translation: 印刷电路板包括彼此层叠的各绝缘层,各绝缘层各自包括树脂和芯,绝缘层分别具有相反侧的第一表面侧和第二表面侧,并且包括多个第一绝缘和第二绝缘层,多个绝缘层 分别形成在第一绝缘层的第一表面侧上的第一表面侧导电层分别形成在第二绝缘层的第二表面侧上的多个第二表面侧导电层。 所述绝缘层包括一个或多个绝缘层,所述绝缘层具有定位成使得所述芯从所述厚度方向的中心向所述第一表面侧移位,所述绝缘层包括位于所述绝缘层的中心的中心绝缘层, 并且第一表面侧和第二表面侧导电层形成为使得第一表面侧导电层的总面积设定为小于第二表面侧导电层的总面积。

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