公开(公告)号：EP1374314A4

公开(公告)日：2008-03-12

申请号：EP02725187

申请日：2002-03-13

Applicant: IBM

Inventor： ACOSTA RAUL E ,  CARASSO MELANIE L ,  CORDES STEVEN A ,  GROVES ROBERT A ,  LUND JENNIFER L ,  ROSNER JOANNA

IPC: H01F17/00 ,  H01F17/04 ,  H01F17/06 ,  H01F27/00 ,  H01F27/06 ,  H01F41/04 ,  H01L21/02 ,  H01L27/08 ,  H01L29/82 ,  H01L29/00

CPC classification number: H01L28/10 ,  H01F17/0006 ,  H01F17/0033 ,  H01F41/041 ,  H01L27/08

Abstract: A means for fabrication of solenoidal inductors interated in a semiconductor chip is provided. A solenoidal coil (50) is partially embedded in a deep well etched into the chip substrate (10). The non-embedded part (30) of the coil is fabricated as part of BEOL metallization layers (52). This allows for large cross-sectional area of the solenoid turns, tus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The farbication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric (14) followed by fabrication of the part of the coil (22) that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric (24 and 28) and planarization of the same by CMP. After planarization the fabrication of the remaining part (30) of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil, part of it may be built by electrodeposition through a mask on top of the BEOL layers.

Abstract translation: 提供了用于制造集成在半导体芯片中的螺线管电感器的装置。 螺线管线圈（50）部分地嵌入深蚀刻到芯片衬底（10）中的深井中。 线圈的非嵌入部分（30）被制造为BEOL金属化层（52）的一部分。 这允许电磁线圈的大横截面积，从而减小了匝间电容耦合。 由于本发明的螺线管线圈具有大直径横截面，因此线圈可以制成具有大电感值并且占用芯片的小面积。 在所有FEOL步骤完成之后，远程处理包括蚀刻衬底中的深腔; 用电介质（14）为所述空腔加衬里，随后制造将通过掩模沉积导电材料金属而嵌入的线圈（22）部分; 电介质（24和28）的沉积以及通过CMP对其进行平坦化。 在平面化之后，螺线管线圈的剩余部分（30）的制造被制造为BEOL中的金属化的一部分（即，BEOL的线路/通孔）。 为了进一步增加螺线管线圈的横截面，可以通过BEOL层上面的掩模通过电沉积来建立其一部分。

公开(公告)号：WO02073702A9

公开(公告)日：2003-03-20

申请号：PCT/US0207992

申请日：2002-03-13

Applicant: IBM

Inventor： ACOSTA RAUL E ,  CARASSO MELANIE L ,  CORDES STEVEN A ,  GROVES ROBERT A ,  LUND JENNIFER L ,  ROSNER JOANNA

IPC: H01F17/00 ,  H01F17/04 ,  H01F17/06 ,  H01F27/00 ,  H01F27/06 ,  H01F41/04 ,  H01L21/02 ,  H01L27/08 ,  H01L29/82 ,  H01L29/00

CPC classification number: H01L28/10 ,  H01F17/0006 ,  H01F17/0033 ,  H01F41/041 ,  H01L27/08

Abstract: A means for fabrication of solenoidal inductors interated in a semiconductor chip is provided. A solenoidal coil (50) is partially embedded in a deep well etched into the chip substrate (10). The non-embedded part (30) of the coil is fabricated as part of BEOL metallization layers (52). This allows for large cross-sectional area of the solenoid turns, tus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The farbication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric (14) followed by fabrication of the part of the coil (22) that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric (24 and 28) and planarization of the same by CMP. After planarization the fabrication of the remaining part (30) of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil, part of it may be built by electrodeposition through a mask on top of the BEOL layers.

Abstract translation: 提供了一种用于制造交错在半导体芯片中的螺线管电感器的装置。 螺线管线圈（50）被部分地嵌入到蚀刻到芯片衬底（10）中的深阱中。 线圈的非嵌入部分（30）被制造为BEOL金属化层（52）的一部分。 这允许螺线管转弯的大截面积，减少匝间电容耦合。 由于本发明的螺线管线圈具有大直径的横截面，所以线圈可以制造成具有大的电感值，并且占据芯片的小面积。 改进方法包括在所有FEOL步骤完成之后蚀刻衬底中的深空腔; 用电介质（14）衬里所述空腔，随后制造将通过掩模沉积导电材料金属而嵌入的线圈（22）的部分; 介电（24和28）的沉积和CMP的平坦化。 在平坦化之后，螺线管线圈的剩余部分（30）的制造被制造为BEOL中的金属化的一部分（即，作为BEOL的线/通路）。 为了进一步增加螺线管线圈的横截面，其一部分可以通过电沉积穿过BEOL层顶部的掩模来构建。

公开(公告)号：DE60237354D1

公开(公告)日：2010-09-30

申请号：DE60237354

申请日：2002-03-13

Applicant: IBM

Inventor： ACOSTA RAUL E ,  CARASSO MELANIE L ,  CORDES STEVEN A ,  GROVES ROBERT A ,  LUND JENNIFER L ,  ROSNER JOANNA

IPC: H01L29/82 ,  H01F17/00 ,  H01F17/04 ,  H01F17/06 ,  H01F27/00 ,  H01F27/06 ,  H01F41/04 ,  H01L21/02 ,  H01L27/08 ,  H01L29/00