1.
    发明专利
    未知

    公开(公告)号:DE60102164D1

    公开(公告)日:2004-04-01

    申请号:DE60102164

    申请日:2001-07-05

    Applicant: IBM

    Abstract: The functionality of a programmable memory built-in self-test (BIST) arrangement for testing an embedded memory structure of an integrated circuit is extended to system level testing to ascertain operability of the system after the integrated circuits and boards including them have been placed in service in larger systems, by generating default test signals which are loaded in an instruction store module when test instructions are not provided from an external tester. This additional utility of the BIST arrangement, increases efficiency of chip space utilization and improves the system level test. Loading of test instructions from an external tester during chip manufacture and/or board assembly is unaffected.

    2.
    发明专利
    未知

    公开(公告)号:DE60102164T2

    公开(公告)日:2004-09-30

    申请号:DE60102164

    申请日:2001-07-05

    Applicant: IBM

    Abstract: The functionality of a programmable memory built-in self-test (BIST) arrangement for testing an embedded memory structure of an integrated circuit is extended to system level testing to ascertain operability of the system after the integrated circuits and boards including them have been placed in service in larger systems, by generating default test signals which are loaded in an instruction store module when test instructions are not provided from an external tester. This additional utility of the BIST arrangement, increases efficiency of chip space utilization and improves the system level test. Loading of test instructions from an external tester during chip manufacture and/or board assembly is unaffected.

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