公开(公告)号：GB2490033B

公开(公告)日：2013-04-24

申请号：GB201206448

申请日：2012-04-12

Applicant: IBM

Inventor： BARRICK BRIAN DAVID ,  ALEXANDER GREGORY WILLIAM ,  WARD JOHN WESLEY III

IPC: G06F9/30 ,  G06F9/38

公开(公告)号：GB2490033A

公开(公告)日：2012-10-17

申请号：GB201206448

申请日：2012-04-12

Applicant: IBM

Inventor： BARRICK BRIAN DAVID ,  ALEXANDER GREGORY WILLIAM ,  WARD III JOHN WESLEY

IPC: G06F9/30 ,  G06F9/38

Abstract: A mapper unit 122 of an out-of-order processor 100 assigns a particular counter currently in a counter free pool 116 to count a number of mappings of logical registers to a particular physical register from among multiple physical registers, responsive to an execution of an instruction by the mapper unit mapping at least one logical register to the particular physical register. The number of counters is less than the number of physical registers. The mapper unit, responsive to the counted number of mappings of logical registers to the particular physical register decremented to less than a minimum value, returns the particular counter to the counter free pool.