公开(公告)号：DE69209888T2

公开(公告)日：1996-10-24

申请号：DE69209888

申请日：1992-02-06

Applicant: IBM

Inventor： BERNSTEIN DAVID ,  HOPKINS MARTIN EDWARD ,  RODEH MICHAEL

IPC: G06F9/30 ,  G06F9/312 ,  G06F9/38 ,  G06F9/45

Abstract: An instruction scheduler for a computer, capable of speculatively scheduling load instructions by moving certain categories of load instructions in an input instruction sequence from a source block of instructions to a target block of instructions to form an output instruction sequence, the instruction scheduler comprising: logic for selecting a data-independent load instruction as a candidate for rescheduling; logic for determining whether the base register that the load instruction makes use of and/or the contents thereof meets any one of a number of conditions; logic for moving the selected load instruction from the source block to the target block in response to determination that any one of the conditions is met.

公开(公告)号：DE69209888D1

公开(公告)日：1996-05-23

申请号：DE69209888

申请日：1992-02-06

Applicant: IBM

Inventor： BERNSTEIN DAVID ,  HOPKINS MARTIN EDWARD ,  RODEH MICHAEL

IPC: G06F9/30 ,  G06F9/312 ,  G06F9/38 ,  G06F9/45

Abstract: An instruction scheduler for a computer, capable of speculatively scheduling load instructions by moving certain categories of load instructions in an input instruction sequence from a source block of instructions to a target block of instructions to form an output instruction sequence, the instruction scheduler comprising: logic for selecting a data-independent load instruction as a candidate for rescheduling; logic for determining whether the base register that the load instruction makes use of and/or the contents thereof meets any one of a number of conditions; logic for moving the selected load instruction from the source block to the target block in response to determination that any one of the conditions is met.

公开(公告)号：GB2273181A

公开(公告)日：1994-06-08

申请号：GB9225211

申请日：1992-12-02

Applicant: IBM

Inventor： BERNSTEIN DAVID ,  RODEH MICHAEL

IPC: G06F12/08 ,  G06F12/0888

公开(公告)号：DE69021659D1

公开(公告)日：1995-09-21

申请号：DE69021659

申请日：1990-06-15

Applicant: IBM

Inventor： BERNSTEIN DAVID ,  SO KIMMING

IPC: G06F11/28 ,  G06F9/52 ,  G06F11/36 ,  G06F15/16 ,  G06F15/177 ,  G06F11/00

Abstract: A serialization debugging facility operates by assisting the computer programmer in the selection of parallel sections of the parallel program for single processor execution in order to locate errors in the program. Information is collected regarding parallel constructs in the source program. This information is used to establish program structure and to locate sections of the program in which parallel constructs are contained. Program structure and the locations of parallel constructs within a program are then displayed as a tree graph. Viewing this display, a programmer selects parallel sections for serialization. Object code for the program is then generated in accordance with the serialization instructions entered by the programmer. Once executed, the programmer can compare the results of execution of parallel sections of the program in a single processor and a multiprocessor environment. Differing execution results in each environment is indicative of a parallel programming error which can then be corrected by the programmer. The programmer can repeat these steps, each time selecting different sections of the program for serialization. In this way, erroneous sections of the program can be localized and identified.

公开(公告)号：DE69021659T2

公开(公告)日：1996-05-02

申请号：DE69021659

申请日：1990-06-15

Applicant: IBM

Inventor： BERNSTEIN DAVID ,  SO KIMMING

IPC: G06F11/28 ,  G06F9/52 ,  G06F11/36 ,  G06F15/16 ,  G06F15/177 ,  G06F11/00

Abstract: A serialization debugging facility operates by assisting the computer programmer in the selection of parallel sections of the parallel program for single processor execution in order to locate errors in the program. Information is collected regarding parallel constructs in the source program. This information is used to establish program structure and to locate sections of the program in which parallel constructs are contained. Program structure and the locations of parallel constructs within a program are then displayed as a tree graph. Viewing this display, a programmer selects parallel sections for serialization. Object code for the program is then generated in accordance with the serialization instructions entered by the programmer. Once executed, the programmer can compare the results of execution of parallel sections of the program in a single processor and a multiprocessor environment. Differing execution results in each environment is indicative of a parallel programming error which can then be corrected by the programmer. The programmer can repeat these steps, each time selecting different sections of the program for serialization. In this way, erroneous sections of the program can be localized and identified.