-
公开(公告)号：EP2810280A4
公开(公告)日：2015-06-24
申请号：EP13742866
申请日：2013-01-11
Applicant: IBM
Inventor： BLAUM MARIO , HAFNER JAMES LEE , HETZLER STEVEN ROBERT
CPC classification number: G06F11/1076 , G06F11/108 , G06F11/1092 , G06F2211/1057 , G06F2211/1059 , H03M13/033
-
公开(公告)号：AU2002358766A8
公开(公告)日：2003-07-15
申请号：AU2002358766
申请日：2002-12-19
Applicant: IBM
Inventor： JAQUETTE GLEN ALAN , MELAS CONSTANTIN MICHAEL , BLAUM MARIO , MARCUS BRIAN HARRY
Abstract: Provided is a method, system, and program for providing synchronization in a binary data stream. A binary data stream is received. A synchronization mark having at least one isolated peak is generated into at least one point in the data stream. An encoded data stream is formed by concatenating the synchronization mark with the received binary data. During decoding, the synchronization mark is detected based on error propagation occurring adjacent to the at least one isolated peak of the synchronization mark.
-
公开(公告)号：CA2817945A1
公开(公告)日：2012-09-07
申请号：CA2817945
申请日：2012-02-10
Applicant: IBM
Inventor： HETZLER STEVEN ROBERT , BLAUM MARIO , HAFNER JAMES LEE
IPC: G06F11/10
Abstract: In a method for storing data in a storage array, write data is arranged into "r" rows and "n" columns of pages, with each page including a plurality of sectors. The write data is encoded using a plurality of horizontal and vertical erasure correcting codes on the pages. The encoding allows recovery from up to tr erasures in any one of the r rows, up to tr-1 erasures in any one of the remaining r-1 rows, up to tr-2 erasures in any one of the remaining r-2 rows, and so on, such that the encoding allows recovery from up to t1 erasures in the last remaining row. Encoded write data is output from the encoding. The encoded write data is written as a write stripe across n storage devices in a storage array.
-
公开(公告)号：GB2502224A
公开(公告)日：2013-11-20
申请号：GB201314853
申请日：2012-02-10
Applicant: IBM
Inventor： HETZLER STEVEN ROBERT , BLAUM MARIO , HAFNER JAMES LEE
IPC: G06F11/10
Abstract: In a method for storing data in a storage array, write data is arranged into "r" rows and "n" columns of pages, with each page including a plurality of sectors. The write data is encoded using a plurality of horizontal and vertical erasure correcting codes on the pages. The encoding allows recovery from up to tr erasures in any one of the r rows, up to tr-1 erasures in any one of the remaining r-1 rows, up to tr-2 erasures in any one of the remaining r-2 rows, and so on, such that the encoding allows recovery from up to t1 erasures in the last remaining row. Encoded write data is output from the encoding. The encoded write data is written as a write stripe across n storage devices in a storage array.
-
公开(公告)号：AU2002358766A1
公开(公告)日：2003-07-15
申请号：AU2002358766
申请日：2002-12-19
Applicant: IBM
Inventor： BLAUM MARIO , JAQUETTE GLEN ALAN , MARCUS BRIAN HARRY , MELAS CONSTANTIN MICHAEL
Abstract: Provided is a method, system, and program for providing synchronization in a binary data stream. A binary data stream is received. A synchronization mark having at least one isolated peak is generated into at least one point in the data stream. An encoded data stream is formed by concatenating the synchronization mark with the received binary data. During decoding, the synchronization mark is detected based on error propagation occurring adjacent to the at least one isolated peak of the synchronization mark.
-
Patent Agency Ranking
公开(公告)号：SG82615A1
公开(公告)日：2001-08-21
申请号：SG1999002731
申请日：1999-05-24
Applicant: IBM
Inventor： SERRANO LOUIS JOSEPH , YU MANTLE MAN-HON , BLAUM MARIO , KABELAC WILLIAM JOHN
Abstract: There is disclosed an error correction and detection method and apparatus for retreiving predetermined data, e.g. servo data, from the position error signal (PES) fields of a disk in a data storage system . In the preferred embodiment the PES data such as the track number is mapped into codewords of an error correction code (ECC) which are then further divided into a set of symbols which are mapped onto a second set of bit vectors which have a constant weight. The preferred encoding method is selected to equalize the analog signal characteristics of the PES fields so that minimal, if any, change in the conventional servo detection circuitry needed to use the PES fields of the invention both as analog and digital information.
-
公开(公告)号：DE112016003465T5
公开(公告)日：2018-04-12
申请号：DE112016003465
申请日：2016-09-02
Applicant: IBM
Inventor： BLAUM MARIO , HETZLER STEVEN ROBERT
IPC: G06F11/10
Abstract: Bereitgestellt wird ein computerrealisiertes Verfahren zum Erhöhen der Ausfalltoleranz eines Arrays von Speicherelementen in einem Speichersystem. Das computerrealisierte Verfahren beinhaltet ein Konfigurieren eines Arrays, so dass er eine Mehrzahl von Speicherelementen in n > 1 Sätzen von Speicherelementen enthält. Das computerrealisierte Verfahren beinhaltet zudem einen Löschkorrektur-Code, der so konfiguriert wird, dass mindestens eine Spalte der Speicherelemente des Arrays Zeilenparitätsinformationen speichert und mindestens eine Zeile der Speicherelemente des Arrays Spaltenparitätsinformationen speichert. Zusätzlich beinhaltet das computerrealisierte Verfahren, dass es nach einem Ausfall eines der Daten speichernden Speicherelemente ein Empfänger-Speicherelement aus dem Array auswählt und mindestens einen Teil der Daten in dem Empfänger-Speicherelement wiederherstellt, indem eine Paritätsaustausch-Operation durchgeführt wird, die eine Ausfalltoleranz des Satzes von Speicherelementen aufrechterhält, der das ausgefallene Speicherelement enthält.
-
公开(公告)号：DE112012000385T5
公开(公告)日：2013-10-10
申请号：DE112012000385
申请日：2012-02-10
Applicant: IBM
Inventor： HETZLER STEVEN ROBERT , BLAUM MARIO , HAFNER JAMES LEE
IPC: G06F11/10
Abstract: Bei einem Verfahren zum Speichern von Daten in einem Speicher-Array sind Schreibdaten in ”r” Zeilen und ”n” Spalten von Seiten angeordnet, wobei jede Seite eine Vielzahl von Sektoren enthält. Die Schreibdaten werden unter Verwendung einer Vielzahl von horizontalen und vertikalen Codes zum Korrigieren von Auslöschungen auf den Seiten codiert. Die Codierung ermöglicht eine Wiederherstellung von bis zu tr Auslöschungen in einer der r Zeilen, bis zu tr-1 Auslöschungen in einer der restlichen r – 1 Zeilen, bis zu tr-2 Auslöschungen in einer der restlichen r – 2 Zeilen, und so weiter, so dass die Codierung eine Wiederherstellung von bis zu t1 Auslöschungen in der letzten verbleibenden Zeile ermöglicht. Von der Codierung werden codierte Schreibdaten ausgegeben. Die codierten Schreibdaten werden als Schreib-Stripe über n Speichereinheiten in einem Speicher-Array geschrieben.
-
公开(公告)号：CA2861410A1
公开(公告)日：2013-08-08
申请号：CA2861410
申请日：2013-01-11
Applicant: IBM
Inventor： BLAUM MARIO , HAFNER JAMES LEE , HETZLER STEVEN ROBERT
IPC: G11C29/00
Abstract: A data storage array includes m rows and n columns of entries, with each entry including at least one sector. In the array, mr+s locations are assigned to parity entries, such that each row has at least r parity entries. The parity entries correspond to a partial-maximum distance separable (PMDS) code that allows recovery from up to r erasures in each of the m rows as well as s additional erasures in any locations in the data array, where s is an integer greater than zero. The write data and the associated parity entries are written to the set of storage devices.
-
公开(公告)号：SG65772A1
公开(公告)日：1999-06-22
申请号：SG1998001736
申请日：1998-07-07
Applicant: IBM
Inventor： BLAUM MARIO , TANG DENNY DUAN-LEE , YASHUDA TAKEO
Abstract: A byte synchronization detection system and method in which a vector subtractor circuit determines an error vector between a current read data pattern and a synchronization bit pattern, and an offset adder circuit determines a Hamming Distance of the next read data pattern by adding the difference between the Hamming Distance from current error vector to the synchronization bit pattern and the Hamming Distance from the next error vector to the synchronization bit pattern. The Hamming Distance is determined by selected elements of the error vector which are the output from the vector subtractor circuit. The offset adder circuit determines a difference between the Hamming Distance of the current read data pattern and of the next read data pattern. The synchronization bit pattern is between 16 and 18 bits in length, inclusive. This approach reduces the probability of synchronization failure and/or mis-synchronization about 4 orders of magnitude over conventional approaches, while also reducing the length of the byte synchronization pattern to 16 bits.
-
-
-
-
-
-
-
-
-
Search Results
14
records
(took 0.017 seconds)
