Method for verifying the functionality of a digital circuit

    公开(公告)号:GB2524979A

    公开(公告)日:2015-10-14

    申请号:GB201406264

    申请日:2014-04-08

    Applicant: IBM

    Abstract: A method for verifying the functionality of a digital circuit with parallel data transfer paths (PCI express) between a sender with a sender deskew circuit and a receiver with a receiver deskew circuit is provided. The method comprises introducing a skew between the at least two parallel data sequences by erasing or replacing one of the control data packets (S, SKP or SKIP) inserted by the sender deskew circuit (21) or by inserting a further control data packet in one of the at least two parallel data sequences before the receipt by the receiver (22) (S5) and checking whether an expected overflow or underflow indication signal is provided by the receiver or not.

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