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公开(公告)号:GB2506902A
公开(公告)日:2014-04-16
申请号:GB201218305
申请日:2012-10-12
Applicant: IBM
Inventor: MAURER THILO , BOETTIGER HANS
IPC: G06F12/08 , G06F12/0862
Abstract: Prefetching data by receiving (102) one or more addresses (404.1, 602, 604, 606) upon execution of an enqueuing command (614, 616, 618) and enqueuing (101) each of the received addresses to a recording-list (408.2). A jump position (504, J.:, J2, J.3) is identified in the recording-list as jump position; and provided to (107) a frame-shifter (424). A sub-list of the recording-list defined by a shiftable frame (502) is used as a playback-list (408.3). A frame-shift command (FSC) is executed to trigger shifting of the frame in dependence on the jump position to provide an updated playback-list (408.3') and data (434) identified by the updated playback-list from a second memory is fetched(208). The addresses may be filtered before, during or after enqueuing in the recording list. Base addresses of recording lists and jump addresses of frame shifts may be stored in MMIO registers.
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公开(公告)号:CA2830605A1
公开(公告)日:2015-04-22
申请号:CA2830605
申请日:2013-10-22
Applicant: IBM CANADA
Inventor: WANG KAI-TING AMY , GAO YAOQING , BOETTIGER HANS , OHMACHT MARTIN
IPC: G06F9/44
Abstract: An illustrative embodiment of a computer-implemented process for a computer-implemented process for code versioning for enabling transactional memory region promotion receives a portion of candidate source code and outlines the portion of candidate source code received for parallel execution. The computer-implemented process further wraps a critical region with entry and exit routines to enter into a speculation sub-process, wherein the entry and exit routines also gather conflict statistics at runtime. The outlined code portion is executed to determine to use a particular one of multiple loop versions according to the conflict statistics gathered at run time.
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公开(公告)号:GB2506900A
公开(公告)日:2014-04-16
申请号:GB201218303
申请日:2012-10-12
Applicant: IBM
Inventor: MAURER THILO , BOETTIGER HANS
IPC: G06F12/08 , G06F12/0862
Abstract: Prefetching data for a processor by receiving (102) one or more first. addresses (40) from the processor; filtering (104) the received one or more first addresses; providing (106) a recording-list (408.2) consisting of the filtered one or more first addresses; receiving (108) at least one second address (404.2) from the processor (204); receiving (110) a playback-list(408.3) comprising all or a subset of the first addresses of the recording-list; comparing (1:2) the at least one second address with each of the first addresses in the playback-list for identifying a matching address; in case a matching address is identified, fetching (114) data (434) from a second memory (208); and transferring (1:6) the fetched data to a first memory (206). Filtering may take place before, during or after enqueuing of addresses. Jump positions assigned to frame shift commands may be specific to the recording list and read from MMIO registers.
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