COMPILER INSTRUMENTATION INFRASTRUCTURE TO FACILITATE MULTIPLE PASS AND MULTIPLE PURPOSE DYNAMIC ANALYSIS

    公开(公告)号:CA2672337C

    公开(公告)日:2017-01-03

    申请号:CA2672337

    申请日:2009-07-15

    Abstract: Systems, methods and articles of manufacture are disclosed for optimizing execution of an application. A plurality of code regions of the application may be instrumented with annotations for generating profile data for each of the plurality of code regions. Profile data for each of the plurality of code regions may be generated via executing the application having instrumented code regions. A delinquent code region may be identified based on the generated profile data for each of the plurality of code regions. A plurality of code sub-regions of the identified delinquent code region may be instrumented with annotations for generating profile data for each of the plurality of code sub-regions. Profile data for each of the plurality of code sub-regions may be generated via executing the application having instrumented code sub-regions. A delinquent code sub-region may be identified based on the generated profile data for each of the plurality of code sub-regions. Execution of the application may be optimized using the identified delinquent code sub-region.

    MANAGING SPECULATIVE ASSIST THREADS

    公开(公告)号:CA2680597A1

    公开(公告)日:2009-12-23

    申请号:CA2680597

    申请日:2009-10-16

    Applicant: IBM CANADA

    Abstract: An illustrative embodiment provides a computer-implemented process for managing speculative assist threads for data pre-fetching that analyzes collected source code and cache profiling information to identify a code region containing a delinquent load instruction and generates an assist thread, including a value for a local version number, at a program entry point within the identified code region. Upon activation of the assist thread the local version number of the assist thread is compared to the global unique version number of the main thread for the identified code region and an iteration distance between the assist thread relative to the main thread is compared to a predefined value. The assist thread is executed when the local version number of the assist thread matches the global unique version number of the main thread, and the iteration distance between the assist thread relative to the main thread is within a predefined range of values.

    CODE VERSIONING FOR ENABLING TRANSACTIONAL MEMORY REGION PROMOTION

    公开(公告)号:CA2830605A1

    公开(公告)日:2015-04-22

    申请号:CA2830605

    申请日:2013-10-22

    Applicant: IBM CANADA

    Abstract: An illustrative embodiment of a computer-implemented process for a computer-implemented process for code versioning for enabling transactional memory region promotion receives a portion of candidate source code and outlines the portion of candidate source code received for parallel execution. The computer-implemented process further wraps a critical region with entry and exit routines to enter into a speculation sub-process, wherein the entry and exit routines also gather conflict statistics at runtime. The outlined code portion is executed to determine to use a particular one of multiple loop versions according to the conflict statistics gathered at run time.

    MANAGING MULTIPLE SPECULATIVE ASSIST THREADS AT DIFFERING CACHE LEVELS

    公开(公告)号:CA2680601A1

    公开(公告)日:2009-12-23

    申请号:CA2680601

    申请日:2009-10-16

    Applicant: IBM CANADA

    Abstract: An illustrative embodiment provides a computer-implemented process for managing multiple speculative assist threads for data pre-fetching that sends a comma nd from an assist thread of a first processor to second processor and a memory, wherein parameters of the command specify a processor identifier of the second processor, responsive t o receiving the command, reply by the second processor indicating an ability to receive a cache line that is a target of a pre-fetch, responsive to receiving the command replying by the memory indicating a capability to provide the cache line, responsive to receiving replies from t he second processor and the memory, sending, by the first processor, a combined response to the second processor and the memory, wherein the combined response indicates an action, and responsive to the action indicating a transaction can continue sending the requested cache line, by t he memory, to the second processor into a target cache level on the second processor.

    MAY-CONSTANT PROPAGATION
    6.
    发明专利

    公开(公告)号:CA2684441C

    公开(公告)日:2012-06-05

    申请号:CA2684441

    申请日:2009-09-22

    Applicant: IBM CANADA

    Abstract: An illustrative embodiment provides a computer-implemented process for may--constant propagation, obtains a source code, and generates a set of associated data structures from the source code and a set of may-constant data structures. The computer--implemented process identifies a candidate code for may-constant propagation to form an identified candidate code, updates the set of may-constant data structures, and selects an identified candidate code using information in the may-constant data structures, including probability, to form a selected candidate code. The computer-implemented process further identifies a code region associated with the selected candidate code to form an identified code region and modifies the identified code region including the selected candidate code.

    MANAGING SPECULATIVE ASSIST THREADS

    公开(公告)号:CA2680597C

    公开(公告)日:2011-06-07

    申请号:CA2680597

    申请日:2009-10-16

    Applicant: IBM CANADA

    Abstract: An illustrative embodiment provides a computer-implemented process for managing speculative assist threads for data pre-fetching that analyzes collected source code and cache profiling information to identify a code region containing a delinquent load instruction and generates an assist thread, including a value for a local version number, at a program entry point within the identified code region. Upon activation of the assist thread the local version number of the assist thread is compared to the global unique version number of the main thread for the identified code region and an iteration distance between the assist thread relative to the main thread is compared to a predefined value. The assist thread is executed when the local version number of the assist thread matches the global unique version number of the main thread, and the iteration distance between the assist thread relative to the main thread is within a predefined range of values.

    MANAGING MULTIPLE SPECULATIVE ASSIST THREADS AT DIFFERING CACHE LEVELS

    公开(公告)号:CA2680601C

    公开(公告)日:2010-11-02

    申请号:CA2680601

    申请日:2009-10-16

    Applicant: IBM CANADA

    Abstract: An illustrative embodiment provides a computer-implemented process for managing multiple speculative assist threads for data pre-fetching that sends a command from an assist thread of a first processor to second processor and a memory, wherein parameters of the command specify a processor identifier of the second processor, responsive to receiving the command, reply by the second processor indicating an ability to receive a cache line that is a target of a pre-fetch, responsive to receiving the command replying by the memory indicating a capability to provide the cache line, responsive to receiving replies from the second processor and the memory, sending, by the first processor, a combined response to the second processor and the memory, wherein the combined response indicates an action, and responsive to the action indicating a transaction can continue sending the requested cache line, by the memory, to the second processor into a target cache level on the second processor.

    MAY-CONSTANT PROPAGATION
    9.
    发明专利

    公开(公告)号:CA2684441A1

    公开(公告)日:2010-02-04

    申请号:CA2684441

    申请日:2009-09-22

    Applicant: IBM CANADA

    Abstract: An illustrative embodiment provides a computer-implemented process for may--constant propagation, obtains a source code, and generates a set of associated data structures from the source code and a set of may-constant data structures. T he computer--implemented process identifies a candidate code for may-constant propagation to form an identified candidate code, updates the set of may-constant data structures, and selects an identified candidate code using information in the may-constant data structures, including probability, to form a selected candidate code. The computer-implemented process further identifies a code region associated with the selected candidate code to form an identified code region and modifies the identified code region including the selected candidate code.

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