公开(公告)号：DE2447255A1

公开(公告)日：1975-06-12

申请号：DE2447255

申请日：1974-10-03

Applicant: IBM

Inventor： BOUDREAU PAUL EMILE ,  BRODD WYNENE DONALD ,  DONNAN ROBERT ANDERSON

IPC: H03M13/00 ,  G06F11/10 ,  H03M7/40 ,  H03M13/03 ,  H04L1/00 ,  H04L1/10

Abstract: In the transmission of variable length frames of digital information separated by one or more flag sequences, a block check is generated and appended to the information bits at the transmitter. The block check is generated by Exclusive OR'ing a predetermined non-zero number to the high order information bits and generating (n-k) check digits according to a cyclic error detecting code. The (n-k) check digits are Exclusive OR'd with an (n-k) bit non-zero number to produce the block check. At the receiver, the first mentioned non-zero number is added to the high order information bits and an (n-k) digit number is generated according to the same cyclic error detecting code used at the transmitter. This number is checked to see if it conforms to a predetermined number indicating error-free transmission. Utilizing the above approach, transmission errors in or near the flag sequence are detected, as well as those which may occur in the information field.