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    3.
    发明专利
    未知

    公开(公告)号：SE334050B

    公开(公告)日：1971-04-05

    申请号：SE1756666

    申请日：1966-12-22

    Applicant: IBM

    Inventor： BROWN P ,  MCDONALD E

    IPC: G11B20/14 ,  H04L25/49 ,  G11B5/04

    Abstract: 1,112,399. Transistor pulse circuits. INTERNATIONAL BUSINESS MACHINES CORPORATION. 28 Oct., 1966 [28 Dec., 1965], No. 48334/66. Heading H3T. [Also in Division G4] In a binary signal detecting system, a pulse generator is enabled when a ramp voltage whose amplitude is related to the repetition rate of signals fed to the system exceeds a threshold determined by a signal repetition rate. Binary data recorded on a magnetic medium in phasemodulated form using a negativegoing and a positive-going transition for data bits 0 and 1 respectively and non-data transitions between bit periods where necessary in consequence, is read at 10 and produces a pulse at 16 for each negative - going transition [and a pulse at 18 for each positivegoing transition. Each pulse passed by AND gates 22, 23 resets a negative-going sawtooth generator 30. When the sawtooth voltage passes below a threshold value, a Schmitt trigger 32 partially enables the AND gates 22, 23 via OR gate 20. The threshold level is an average of the actual sawtooth range as determined by a filter 34, so if the bit frequency of the input at 10 varies, the threshold varies correspondingly since the period between resets of the sawtooth determines the peak voltage actually developed by the sawtooth. Thus the AND gates 22, 23 will remove pulses resulting from non-data transitions despite variations in the bit frequency. A sequence of Os, followed by a single 1, precede the message on the magnetic record. A " force gate " signal is present, as shown, during reading of most of the initial sequence of 0s, and the " begin record " signal is present thereafter. Flip-flop 44 is set to enable AND gate 40, by the single 1 mentioned. Data pulses (present for 1, absent for 0) and clock pulses appear where shown at the right in Fig. 1. The invention is also applicable to doublefrequency recording in which data is represented by presence or absence of data pulses between regularly occurring clock pulses. In this case, the clock pulses are segregated from the data pulses and then used to synchronize the sawtooth-Schmitt combination above.

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