STRUCTURE FOR DETECTING ELECTROSTATIC CHARGE EFFECTS IN DEVICE PROCESSING

    公开(公告)号:JP2003229464A

    公开(公告)日:2003-08-15

    申请号:JP2002330937

    申请日:2002-11-14

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device monitor structure which can detect localized defects due to floating-body effects, particularly on SOI device wafers. SOLUTION: The semiconductor device monitor structure includes a plurality of cells containing PFET or NFET device, disposed at a perimeter of the semiconductor device monitor structure which is bordered by an insulating region such as shallow trench isolation (STI). Each cell includes polysilicon gate structure having a specific spacing given by a first distance, and a portion extending beyond the perimeter a second distance. The cells are constructed in accordance with progressively varying ground rules, so that the first distance and the second distance are non-uniform between the cells. The cells may be turned to bit file map for single-cell failures, thereby enabling detection of the localized defects due to the floating-body effects. COPYRIGHT: (C)2003,JPO

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