公开(公告)号：DE69019585T2

公开(公告)日：1996-01-18

申请号：DE69019585

申请日：1990-02-20

Applicant: IBM

Inventor： CAVALIERE JOHN RICHARD ,  CHAN ALAN KA-JUN ,  MICHAIL MICHEL SALIB

IPC: G11C8/16 ,  G11C11/411 ,  G11C8/00

Abstract: A semiconductor memory cell for selectively storing or outputting differential signals responsive to a SELECT signal supplied on a word line includes: a transistor pair having cross-coupled base-collector terminals and emitter terminals connected to a common reference potential; sensing means connected to each of the base-collector terminals in the transistor pair, each of the sensing means including (a) a first diode having a cathode connected to the base-collector terminal, (b) a second diode having an anode connected to the anode of the first diode and a cathode connect-ed to the word line, and (c) means connected at the commonly connected anodes of the first and second diodes for amplifying the signal thereat; writing means connected to each of the transistors in the transistor pair, the writing means including a transistor having a base connected to the word line and a collector connected to the base-collector terminal; and means for supplying constant current to each of the base-collector terminals and to each of the commonly connected anodes of the first and second diodes. The memory cell permits read access or select while maintaining the voltages on the latch nodes stable.

公开(公告)号：DE69019585D1

公开(公告)日：1995-06-29

申请号：DE69019585

申请日：1990-02-20

Applicant: IBM

Inventor： CAVALIERE JOHN RICHARD ,  CHAN ALAN KA-JUN ,  MICHAIL MICHEL SALIB

IPC: G11C8/16 ,  G11C11/411 ,  G11C8/00

Abstract: A semiconductor memory cell for selectively storing or outputting differential signals responsive to a SELECT signal supplied on a word line includes: a transistor pair having cross-coupled base-collector terminals and emitter terminals connected to a common reference potential; sensing means connected to each of the base-collector terminals in the transistor pair, each of the sensing means including (a) a first diode having a cathode connected to the base-collector terminal, (b) a second diode having an anode connected to the anode of the first diode and a cathode connect-ed to the word line, and (c) means connected at the commonly connected anodes of the first and second diodes for amplifying the signal thereat; writing means connected to each of the transistors in the transistor pair, the writing means including a transistor having a base connected to the word line and a collector connected to the base-collector terminal; and means for supplying constant current to each of the base-collector terminals and to each of the commonly connected anodes of the first and second diodes. The memory cell permits read access or select while maintaining the voltages on the latch nodes stable.