公开(公告)号：DE69418395T2

公开(公告)日：1999-12-16

申请号：DE69418395

申请日：1994-07-07

Applicant: IBM

Inventor： CHASE ALAN WALTER ,  WILSON JAMES WARREN

IPC: C08L75/00 ,  H01L21/56 ,  C08L75/04 ,  H01L23/29 ,  H01L23/31

Abstract: A chip carrier is disclosed which includes a chip carrier substrate and at least one semiconductor chip mounted in a flip chip configuration, via solder balls, on a circuitized surface of the chip carrier substrate. The solder balls are encapsulated in a first encapsulant having a composition which includes an epoxy. In addition, at least a portion of the circuitry on the circuitized surface is encapsulated in a second encapsulant having a composition which includes a urethane, and which composition is chosen so that the second encapsulant exhibits a modulus of elasticity which is equal to or less than about 10,000 psi. As a consequence, the second encapsulant exhibits neither internal cracks, nor interfacial cracks at the interface with the first encapsulant, nor does the second encapsulant delaminate from the circuitized surface, when the chip carrier is thermally cycled.

公开(公告)号：CA2126121C

公开(公告)日：1997-09-16

申请号：CA2126121

申请日：1994-06-17

Applicant: IBM

Inventor： CHASE ALAN WALTER ,  WILSON JAMES WARREN

IPC: C08L75/04 ,  C08L75/00 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L23/12

Abstract: A chip carrier is disclosed which includes a chip carrier substrate and at least one semiconductor chip mounted in a flip chip configuration, via solder balls, on a circuitized surface of the chip carrier substrate. The solder balls are encapsulated in a first encapsulant having a composition which includes an epoxy. In addition, at least a portion of the circuitry on the circuitized surface is encapsulated in a second encapsulant having a composition which includes a urethane, and which composition is chosen so that the second encapsulant exhibits a modulus of elasticity which is equal to or less than about 10,000 psi. As a consequence, the second encapsulant exhibits neither internal cracks, nor interfacial cracks at the interface with the first encapsulant, nor does the second encapsulant delaminate from the circuitized surface, when the chip carrier is thermally cycled.

公开(公告)号：DE69418395D1

公开(公告)日：1999-06-17

申请号：DE69418395

申请日：1994-07-07

Applicant: IBM

Inventor： CHASE ALAN WALTER ,  WILSON JAMES WARREN

IPC: C08L75/00 ,  H01L21/56 ,  C08L75/04 ,  H01L23/29 ,  H01L23/31

Abstract: A chip carrier is disclosed which includes a chip carrier substrate and at least one semiconductor chip mounted in a flip chip configuration, via solder balls, on a circuitized surface of the chip carrier substrate. The solder balls are encapsulated in a first encapsulant having a composition which includes an epoxy. In addition, at least a portion of the circuitry on the circuitized surface is encapsulated in a second encapsulant having a composition which includes a urethane, and which composition is chosen so that the second encapsulant exhibits a modulus of elasticity which is equal to or less than about 10,000 psi. As a consequence, the second encapsulant exhibits neither internal cracks, nor interfacial cracks at the interface with the first encapsulant, nor does the second encapsulant delaminate from the circuitized surface, when the chip carrier is thermally cycled.

公开(公告)号：BR9402986A

公开(公告)日：1995-07-18

申请号：BR9402986

申请日：1994-07-28

Applicant: IBM

Inventor： CHASE ALAN WALTER

IPC: C08L75/04 ,  C08L75/00 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31

Abstract: A chip carrier is disclosed which includes a chip carrier substrate and at least one semiconductor chip mounted in a flip chip configuration, via solder balls, on a circuitized surface of the chip carrier substrate. The solder balls are encapsulated in a first encapsulant having a composition which includes an epoxy. In addition, at least a portion of the circuitry on the circuitized surface is encapsulated in a second encapsulant having a composition which includes a urethane, and which composition is chosen so that the second encapsulant exhibits a modulus of elasticity which is equal to or less than about 10,000 psi. As a consequence, the second encapsulant exhibits neither internal cracks, nor interfacial cracks at the interface with the first encapsulant, nor does the second encapsulant delaminate from the circuitized surface, when the chip carrier is thermally cycled.