MULTIPLEXER CIRCUIT
    1.
    发明专利

    公开(公告)号:JPH06343036A

    公开(公告)日:1994-12-13

    申请号:JP30385991

    申请日:1991-10-24

    Applicant: IBM

    Abstract: PURPOSE: To provide a high-speed multiplexer circuit with which the number of semiconductors to be used is minimized. CONSTITUTION: The high-speed multiplexer circuit is provided with plural input bipolar transistors 16 and a reference bipolar transistor 32. Concerning the input and reference transistors 16 and 32, their emitters are commonly coupled to an emitter current source 36 and their collectors are coupled to a collector power source 18. The collector of reference transistor 32 is coupled through an impedance 40 to the collector power source 18. The reference voltage is connected to the base of reference bipolar transistor 32 and applies a bias for conduction. Input signals to be multiplexed are connected to the respective bases of input bipolar transistors 16 and between the bases of respective input bipolar transistors 16 and a switch input, a diode circuit 26 is coupled. In the first state, the switch input conducts this diode circuit, clamps the base of this input transistor and prevents that transistor from responding to a signal input.

    AC JUNCTION COMPLEMENTARY TYPE PULL-UP AND PULL-DOWN CIRCUIT

    公开(公告)号:JPH04287519A

    公开(公告)日:1992-10-13

    申请号:JP32832491

    申请日:1991-11-18

    Applicant: IBM

    Abstract: PURPOSE: To provide a high-speed low-power emitter combination logic(ECL) circuit and a non-threshold logic(NTL) circuit using an AC combination complementary push-pull output stage. CONSTITUTION: This circuit 19 combines an AC pulse obtained from the replica of an input signal with the bases of complementary PNP-NPN push-pull transistors 25 and 26 using two capacitors 34 and 35 to generate a large transient current, so that high-speed operation with extremely less DC power consumption is realized. By this combination structure, a proper logic level is kept using an extremely less switching current in a logic (current switching) stage, and also influence to switching speed due to large pull-up resistors 27 and 28 in the logic stage is prevented.

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