公开(公告)号：CA2135507A1

公开(公告)日：1995-07-06

申请号：CA2135507

申请日：1994-11-09

Applicant: IBM

Inventor： CIESLAK RANDALL A ,  GEORGIOU CHRISTOS J ,  LI CHUNG-SHENG

IPC: H04M7/00 ,  H04L12/56 ,  H04L12/64 ,  H04Q11/04

Abstract: A packet switch system having a buffer occupancy reduction mechanism for controlling data flow through switched nodes of the system to avoid congestion and reduce required buffer storage at the nodes. For an isochronous connection, buffers are initially allocated at each switching node connection to ensure listless transmission of packets. A buffer occupancy trace for the connection is recorded and the delay time of an isochronous packet at a particular switch port is returned to a preceding switch port. The preceding switch port employs the feedback message to delay subsequent packets through the connection to reduce the queuing time at the particular switch port. Once the isochronous connection has stabilized, buffer reallocation is performed wherein a scheduler at each switch node along the connection attempts to combine buffer allocations for different isochronous connections. This occurs provided the corresponding buffer occupancy traces of the isochronous connections do not overlap. Buffer occupancy reduction is therefore accomplished through the delaying of isochronous packets propagated through the connections of the packet switch system and the reallocating of buffers initially assigned to two or more isochronous connections.