RECEIVE/BYPASS CIRCUIT FOR SUBSYSTEMS IN POLLING SYSTEM

    公开(公告)号:CA1124813A

    公开(公告)日:1982-06-01

    申请号:CA332646

    申请日:1979-07-27

    Applicant: IBM

    Abstract: RECEIVE/BYPASS CIRCUIT FOR SUBSYSTEMS IN POLLING SYSTEM A polling system includes a central processor and a plurality of subsystems connected in a loop to the central processor. A receive/bypass circuit in each subsystem includes a depletion mode field effect transistor having its drain and source electrodes connected in series in a bypass line at the subsystem. A control circuit is connected to a polling signal input line at each subsystem. When the subsystem has power, the control circuit routes the polling signal to a terminal device in the subsystem while establishing a conduction-inhibiting voltage at the gate electrode of the field effect transistor. When the subsystem is unpowered or out of service, a switching transistor in the control circuit isolates the terminal device from the polling signal input line. The polling signal bypasses an unpowered subsystem through the unbiased field effect transistor in the bypass line. RA9-77-009

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