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公开(公告)号:JPS6148071A
公开(公告)日:1986-03-08
申请号:JP13926885
申请日:1985-06-27
Applicant: Ibm
Inventor: COOPER JOHN FREDERICK , KIRKPATRICK EDWARD SCOTT , LINSKER RALPH
CPC classification number: G06F17/5077 , H05K3/0005
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公开(公告)号:DE3587055T2
公开(公告)日:1993-08-12
申请号:DE3587055
申请日:1985-07-23
Applicant: IBM
Inventor: COOPER JOHN FREDERICK , KIRKPATRICK EDWARD SCOTT , LINSKER RALPH
Abstract: A method for distributing wire load among the layers of a multilayer interconnection package such that in each region of the package, the wire load is balanced among all layers and such that specified subsets of two-pin connections may be constrained to lie within the same layer.More specifically a method is disclosed for distributing connections within the layers of a multilayer circuit board, the method comprising the steps of: a) reading connection data relating to the location of pins on the interconnection board at which the connections terminate; b) defining a connection type for each connection based on the locations of the pins of said connection; and c) distributing connections of one or more connection types among the layers of the interconnection board such that for each connection type, the difference in the number of connections of that type distributed to each of the several layers is less than or equal to 1.
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公开(公告)号:DE3587055D1
公开(公告)日:1993-03-18
申请号:DE3587055
申请日:1985-07-23
Applicant: IBM
Inventor: COOPER JOHN FREDERICK , KIRKPATRICK EDWARD SCOTT , LINSKER RALPH
Abstract: A method for distributing wire load among the layers of a multilayer interconnection package such that in each region of the package, the wire load is balanced among all layers and such that specified subsets of two-pin connections may be constrained to lie within the same layer.More specifically a method is disclosed for distributing connections within the layers of a multilayer circuit board, the method comprising the steps of: a) reading connection data relating to the location of pins on the interconnection board at which the connections terminate; b) defining a connection type for each connection based on the locations of the pins of said connection; and c) distributing connections of one or more connection types among the layers of the interconnection board such that for each connection type, the difference in the number of connections of that type distributed to each of the several layers is less than or equal to 1.
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