公开(公告)号：GB2581753B

公开(公告)日：2021-01-06

申请号：GB202008687

申请日：2018-11-08

Applicant: IBM

Inventor： NICHOLAS MATSAKIS ,  CRAIG WALTERS ,  JANE BARTIK ,  CHUNG-LUNG SHUM ,  ELPIDA TZORTZATOS

IPC: G06F12/0817 ,  G06F12/084

Abstract: A shared cache line is concurrently modified by multiple processors of a computing environment. The concurrent modification is performed based, at least, on receiving one or more architected instructions (Fetch due to Non-Coherent Store instructions) that permit multiple processors to concurrently update the shared cache line absent obtaining a lock or having exclusive ownership of the data.

公开(公告)号：GB2581753A

公开(公告)日：2020-08-26

申请号：GB202008687

申请日：2018-11-08

Applicant: IBM

Inventor： NICHOLAS MATSAKIS ,  CRAIG WALTERS ,  JANE BARTIK ,  CHUNG-LUNG SHUM ,  ELPIDA TZORTZATOS

IPC: G06F12/0817 ,  G06F12/084

Abstract: A shared cache line is concurrently modified by multiple processors of a computing environment. The concurrent modification is performed based, at least, on receiving one or more architected instructions (Fetch due to Non- Coherent Store instructions) that permit multiple processors to concurrently update the shared cache line absent obtaining a lock or having exclusive ownership of the data.