公开(公告)号：DE68924313D1

公开(公告)日：1995-10-26

申请号：DE68924313

申请日：1989-06-20

Applicant: IBM

Inventor： CURRAN BRIAN WILLIAM ,  D ONOFRIO JOSEPH MICHAEL ,  FUQUA RICHARD NICKELS ,  HERZL ROBERT DOV ,  MILICH LOUIS JAMES ,  MOORE PAUL MILTON ,  TEMPLE JOSEPH LESTER

IPC: G06F12/08 ,  G06F15/16

Abstract: An improved multiprocessor system of the type including a plurality of processors and an array of memories interconnected by an interrogation logic where the processors have a store-in cache is presented. In such processors the most recent copy of the data does not always reside in the memories but can reside in a processor's cache necessitating cross-interrogation producing system delays. These delays are reduced by a fetch buffer selectively coupled to each memory for holding data before cross-interrogation and other checks are complete.

公开(公告)号：DE68924313T2

公开(公告)日：1996-05-02

申请号：DE68924313

申请日：1989-06-20

Applicant: IBM

Inventor： CURRAN BRIAN WILLIAM ,  D ONOFRIO JOSEPH MICHAEL ,  FUQUA RICHARD NICKELS ,  HERZL ROBERT DOV ,  MILICH LOUIS JAMES ,  MOORE PAUL MILTON ,  TEMPLE JOSEPH LESTER

IPC: G06F12/08 ,  G06F15/16

Abstract: An improved multiprocessor system of the type including a plurality of processors and an array of memories interconnected by an interrogation logic where the processors have a store-in cache is presented. In such processors the most recent copy of the data does not always reside in the memories but can reside in a processor's cache necessitating cross-interrogation producing system delays. These delays are reduced by a fetch buffer selectively coupled to each memory for holding data before cross-interrogation and other checks are complete.