公开(公告)号：JP2000269794A

公开(公告)日：2000-09-29

申请号：JP2000049573

申请日：2000-02-25

Applicant: IBM

Inventor： ALBERT MANHII CHUU ,  DANIEL MARK DROPS ,  FERRAIOLO FRANK D ,  KEVIN CHARLES GOWER ,  ROGER PAUL GREGOR

IPC: G06F5/06 ,  H03K5/00 ,  H03K5/13 ,  H03L7/081

Abstract: PROBLEM TO BE SOLVED: To provide a programmable delay element circuit that is used for a high-performance computer system. SOLUTION: A programmable delay element 100 is provided with a precise delay element 200 having a fractional delay unit. The precise delay element 200 is provided with a precise delay circuit having a plurality of selective delay paths. The precise delay element 200 is electrically connected to a data terminal used to receive and delay an input signal. A control circuit is electrically connected to the precise delay element 200 to select a delay path for the input signal. Furthermore, the precise delay element 200 is electrically coupled to a rough delay circuit 115 provided with a plurality of selective delay blocks adopting a repetitive configuration. The control circuit is electrically coupled to the selective delay paths of the precise delay element 200 and the rough delay circuit 115, so as to select a precise delay or a rough delay or both the precise delay and the rough delay.