公开(公告)号：DE2647274A1

公开(公告)日：1977-06-16

申请号：DE2647274

申请日：1976-10-20

Applicant: IBM

Inventor： DEBAR DAVID E ,  MONEDA FRANCISCO H DE LA

IPC: H01L21/66 ,  H01L21/82 ,  H01L27/146 ,  H04N3/14 ,  H01L27/14

公开(公告)号：FR2335053A1

公开(公告)日：1977-07-08

申请号：FR7633197

申请日：1976-10-27

Applicant: IBM

Inventor： DEBAR DAVID E ,  MONEDA FRANCISCO H DE LA

IPC: H01L21/66 ,  H01L21/82 ,  H01L27/146 ,  H01L27/14 ,  H01L21/70

公开(公告)号：DE69016151T2

公开(公告)日：1995-06-29

申请号：DE69016151

申请日：1990-08-09

Applicant: IBM

Inventor： DEBAR DAVID E ,  SHAH INDRAVADAN J

IPC: G01R19/04 ,  G01R19/30

Abstract: The current peak detector can be described as four separate sections. The first section is power distribution (42). The second is the analog section (30, 30 min ) where the Idd current transient peak is first detected. There are two analog sections, one for Idd internal, and another for Idd external. The third section is the automatic multiplexer (34) that controls which of two analog sections (30, 30 min ) will drive a digital section (36). The fourth and final section is the digital section (36) where a voltage that is analogous to the peak current is converted to a DC voltage level with infinite memory. The digital section (36) performs the logic function of replacing any prior digitized voltage peak with any higher voltage peak that may occur during the test period.

公开(公告)号：CA1077604A

公开(公告)日：1980-05-13

申请号：CA267508

申请日：1976-12-09

Applicant: IBM

Inventor： DEBAR DAVID E ,  DE LA MONEDA FRANCISCO H

IPC: H01L21/66 ,  H01L21/82 ,  H01L27/146 ,  H01L31/08 ,  H01L31/18

Abstract: Variations of current gain from element to element in a phototransistor array are eliminated by covering the array with an opaque mask and etching openings in the mask over each phototransistor based upon an area reduction factor (ARF). The area reduction factor for an opening is equal to (Im/Ix)1-n where n is a constant definitive of the change in beta of a phototransistor in the array over a given range of collector currents; Im is the minimum collector current measured for the array and Ix is the collector current for the phototransistor beneath the opening. Based upon the ARF's, the openings etched in the mask or cover initiate uniform current form each phototransistor element when uniform light flux is directed on the array. The process of fabricating the array comprises measuring the collector current for each phototransistor element at a given uniform light flux; determining the element with minimum collector current in the array; calculating the ARF for each phototransistor to achieve a uniform current response from the array; coating the array with an opaque cover, and etching the cover at each phototransistor based upon the ARF.

公开(公告)号：DE69016151D1

公开(公告)日：1995-03-02

申请号：DE69016151

申请日：1990-08-09

Applicant: IBM

Inventor： DEBAR DAVID E ,  SHAH INDRAVADAN J

IPC: G01R19/04 ,  G01R19/30

Abstract: The current peak detector can be described as four separate sections. The first section is power distribution (42). The second is the analog section (30, 30 min ) where the Idd current transient peak is first detected. There are two analog sections, one for Idd internal, and another for Idd external. The third section is the automatic multiplexer (34) that controls which of two analog sections (30, 30 min ) will drive a digital section (36). The fourth and final section is the digital section (36) where a voltage that is analogous to the peak current is converted to a DC voltage level with infinite memory. The digital section (36) performs the logic function of replacing any prior digitized voltage peak with any higher voltage peak that may occur during the test period.

公开(公告)号：DE3262179D1

公开(公告)日：1985-03-21

申请号：DE3262179

申请日：1982-03-01

Applicant: IBM

Inventor： DEBAR DAVID E

IPC: G09G3/30 ,  G11C13/04

Abstract: A randomly accessible memory display (2) is disclosed wherein a latching memory panel can be placed in direct optical contact with the triggering electroluminescent panel (12) having a similar matrix. Once the glowing light from the trigger panel (12) shines on the photosensitive resistive layer (8) providing positive feedback, the corresponding region in the latching memory panel is latched. In accordance with the invention, a technique is disclosed for electrically reading the latched state in any one cell. This is done by selectively propagating a high frequency sinusoidal interrogation signal through each of the Y axis lines (6) connected to the cells and measuring any phase alteration in each of the X axis lines (18) connected to the cells, for each Y axis line interrogated. Since the resistance of the photosensitive resistor for a particular latching cell is altered if that cell is emitting light, the impedance of the cell is changed, thereby introducing a phase shift to the interrogation signal. The detection of the phase shift indicates whether the selected cell is latched in its light-emitting or light-extinguished state.