公开(公告)号：CA1119297A

公开(公告)日：1982-03-02

申请号：CA323622

申请日：1979-03-15

Applicant: IBM

Inventor： DEUTSCH ALINA ,  KRYDER MARK H ,  NYSTROM WALTER

IPC: G11C11/14 ,  G11C19/08 ,  G11C19/28

Abstract: COINCIDENTALLY SELECTED BUBBLE DOMAIN STORAGE ARRAY A magnetic bubble domain storage system comprising an array of rows and columns of logical chips, individual ones of which can be selected for writing in information or for reading out information. The logical bubble chips used for bubble domain storage (or logic) are organized into logical half-chips with even numbered bits (bits 2, 4, ...etc.) in one half-chip and odd numbered bits (bits 1, 3, 5 ... etc.) in the other half-chip. Alternating rows of half-chips are used for storing even numbered bits and odd numbered bits, respectively. Each half-chip has its own bubble domain generator, but a common generator current line serves all generators for a row of even half-chips and all generators for a row of odd half-chips. Thus, information is written into even half-chips and odd half-chips at the same time by pulsing the generator current line common to a row of even half-chips and a row of odd half-chips. Each half-chip has a sensing element and all the sensing elements corresponding to a row of half-chips are connected in series. The series connection of sensors in any row forms one leg of a bridge circuit, and another leg of the bridge circuit is another series connection of sensors in another row of the storage array. One of these legs corresponds to sensors from a row of even half-chips while the other leg corresponds to sensors from a row of odd half-chips. The other two legs of f the bridge circuit are comprised of dummy resistors. Even YO977-076 though two rows of sensors are connected to the same bridge circuit, even numbered bits and odd numbered bits will be read at alternating times. By proper pulsing of current carrying lines, used for the read operation, any half-chip out of those in the same row can be selected for read-out. Information can be written back into the half-chips in the same cycle in which information is read from these chips, by having a connection between the sense amplifiers and the generator current lines. Y0977-076

公开(公告)号：DE68922381T2

公开(公告)日：1995-11-23

申请号：DE68922381

申请日：1989-11-11

Applicant: IBM

Inventor： DEUTSCH ALINA ,  OPRYSKO MODEST M ,  RITSKO JOHN J ,  ROTHMAN LAURA B

IPC: H01L21/66 ,  G01R31/28 ,  H01L23/544

Abstract: A thin film region 14 of a multichip carrier 10 is provided with at least one fabrication process or tooling monitor for monitoring the quality of the fabrication process during the sequential formation of the layers of the region 14. The process monitor is formed with a desired layer or layers of the thin film region, such as by a photolithographic process. A centrally disposed active wiring region 30 of a layer is surrounded by peripherally disposed fabrication monitor sites 32. The sites 32 can be located such that they do not occupy or interfere with the surface area required for the wiring region 30 while still being disposed near enough to the wiring region such that the electrical and physical characteristics of the thin film is substantially the same. Four different types of thin film fabrication process monitors are disclosed, including a line/via monitor, a dielectric monitor, a laser assisted repair monitor and a laser assisted engineering change monitor.

公开(公告)号：DE68922381D1

公开(公告)日：1995-06-01

申请号：DE68922381

申请日：1989-11-11

Applicant: IBM

Inventor： DEUTSCH ALINA ,  OPRYSKO MODEST M ,  RITSKO JOHN J ,  ROTHMAN LAURA B

IPC: H01L21/66 ,  G01R31/28 ,  H01L23/544

Abstract: A thin film region 14 of a multichip carrier 10 is provided with at least one fabrication process or tooling monitor for monitoring the quality of the fabrication process during the sequential formation of the layers of the region 14. The process monitor is formed with a desired layer or layers of the thin film region, such as by a photolithographic process. A centrally disposed active wiring region 30 of a layer is surrounded by peripherally disposed fabrication monitor sites 32. The sites 32 can be located such that they do not occupy or interfere with the surface area required for the wiring region 30 while still being disposed near enough to the wiring region such that the electrical and physical characteristics of the thin film is substantially the same. Four different types of thin film fabrication process monitors are disclosed, including a line/via monitor, a dielectric monitor, a laser assisted repair monitor and a laser assisted engineering change monitor.

公开(公告)号：DE2917062A1

公开(公告)日：1979-11-15

申请号：DE2917062

申请日：1979-04-27

Applicant: IBM

Inventor： DEUTSCH ALINA ,  KRYDER MARK HOWARD ,  NYSTROM WALTER

IPC: G11C11/14 ,  G11C19/08 ,  G11C19/28 ,  G11C11/155

Abstract: A magnetic bubble domain storage system comprising an array of rows and columns of logical chips are organized into logical half-chips with even numbered bits in one half-chip and odd numbered bits in the other half-chip. Alternating rows of half-chips are used for storing even numbered bits and odd numbered bits, respectively. Each half-chip has its own bubble domain generator, but a common generator current line serves all generators for a row of even half-chips and all generators for a row of odd half-chips. Thus, information is written into even half-chips and odd half-chips at the same time by pulsing the generator current line common to a row of even half-chips and a row of odd half-chips. Each half-chip has a sensing element and all the sensing elements corresponding to a row of half-chips are connected in series. The series connection of sensors in any row forms one leg of a bridge circuit, and another leg of the bridge circuit is another series connection of sensors in another row of the storage array. One of these legs corresponds to sensors from a row of even half-chips while the other leg corresponds to sensors from a row of odd half-chips. The other two legs of the bridge circuit are comprised of dummy resistors. Even though two rows of sensors are connected to the same bridge circuit, even numbered bits and odd numbered bits will be read at alternating times.