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    2.
    发明专利
    未知

    公开(公告)号：DE1474050A1

    公开(公告)日：1969-08-21

    申请号：DE1474050

    申请日：1964-12-21

    Applicant: IBM

    Inventor： STANTON CARTER RICHARD ,  WILFRED WELZ WALTER ,  DONALD ROSS RALPH

    IPC: G06F9/32 ,  G06F9/34 ,  G06F9/355 ,  G06F15/78

    Abstract: 1,070,425. Gated counters. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 22, 1964 [Dec. 23, 1963], No. 52006/64. Heading G4A. A commutator circuit comprises a group of control latches (Fig. 1, not shown), each adapted when set to permit setting of a corresponding latch in either of two groups of output latches (Fig. 2, not shown), which of the two output latches is set depending on the state of a further control latch, and each output latch when set permitting the setting of one of the control latches so that set and reset signals applied to the circuit cause the output latches to be set in turn. Four input lines, viz. set output latches, reset control latches, set control latches, reset output latches, are energized in turn (in that order) and repetitively. The reset lines are applied to the latches directly but the set lines are applied to the output and control latches via AND-gates controlled by the control and output latches respectively. After a zeroth (called OP) output latch has been set by an external signal, the circuit responds to the set output latches signals to set the first to fifth output latches in response to the reset state of the seventh control latch together with the set states of the first to fifth control latches respectively, and then to set the sixth to eleventh output latches in response to the set state of the seventh control latch together with the set states of the first to sixth control latches respectively, and then to set the twelfth output latch in response to the set state of the sixth control latch together with the reset state of the seventh control latch, the control latches being set and reset as necessary for the above mode of operation in response to the set and reset control latch signals under control in part of the output latches. The first, second, sixth and seventh output latches can be skipped. The subject matter is included in Specification 1,070,423 which is referred to.

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