NON-UNIFORM MEMORY ACCESS (NUMA) DATA PROCESSING SYSTEM THATHOLDS AND REISSUES REQUESTS AT A TARGET PROCESSING NODE IN RESPONSE TO A RETRY

    公开(公告)号:CA2280172C

    公开(公告)日:2006-04-18

    申请号:CA2280172

    申请日:1999-08-12

    Applicant: IBM

    Abstract: A non-uniform memory access (NUMA) computer system includes at least a local processing node and a remote processing node that are each coupled to a node interconnect. The local processing node includes at least a processor and a local system memory, and the remote processing node includes at least a processor having an associated cache memory, a loca l system memory, and a node controller that are each coupled to a local interconnect. In response to receipt by the node controller of a request transaction transmitted from the local processing no de via the node interconnect, the node controller at the remote processing node issues the request transaction on the local interconnect. If the request transaction receives a retry response at the remote processing node, the node controller does not immediately return the retry response to the local processing node. Instead, the node controller reissues the request transaction on the local interconnect at least once, thus giving the request transaction another opportunity to complete successfully. In one embodiment, the request transaction is reissued on the local interconnect of the remote processing node until a response other than retry is received or until a retry limit is reached.

    NON-UNIFORM MEMORY ACCESS (NUMA) DATA PROCESSING SYSTEM THAT HOLDS AND REISSUES REQUESTS AT A TARGET PROCESSING NODE IN RESPONSE TO A RETRY

    公开(公告)号:CA2280172A1

    公开(公告)日:2000-03-21

    申请号:CA2280172

    申请日:1999-08-12

    Applicant: IBM

    Abstract: A non-uniform memory access (NUMA) computer system includes at least a local processing node and a remote processing node that are each coupled to a node interconnect. The local processing node includes at least a processor and a local system memory, and the remote processing node includes at least a processor having an associated cache memory, a local system memory, and a node controller that are each coupled to a local interconnect. In response to receipt by the node controller of a request transaction transmitted from the local processing node via the node interconnect, the node controller at the remote processing node issues the request transaction on the local interconnect. If the request transaction receives a retry response at the remote processing node, the node controller does not immediately return the retry response to the local processing node. Instead, the node controller reissues the request transaction on the local interconnect at least once, thus giving the request transaction another opportunity to complete successfully. In one embodiment, the request transaction is reissued on the local interconnect of the remote processing node until a response other than retry is received or until a retry limit is reached.

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